Lan Amy Zhang

US Patent:

6428906, Aug 6, 2002

Filed:

May 30, 2000

Appl. No.:

09/583317

Inventors:

Bunsen Y. Wong - San Diego CA
Lan Zhang - Fremont CA

Assignee:

Maxtor Corporation - Longmont CO

International Classification:

G11B 564

US Classification:

428611, 428650, 428668, 428694 TS, 2041922

Abstract:

A magnetic recording medium such as a magnetic disk comprises a substrate of NiP or ceramic glass on which is sputtered an underlayer of TiAl or other alloy which has a L structure or a disordered fcc structure. A magnetic layer of a cobalt alloy is then sputtered on the underlayer with the magnetic layer having a magnetization which is perpendicular to the layer. A carbon overcoat can be sputtered on the cobalt alloy magnetic layer with a lubricant layer deposited on the carbon overcoat.

US Patent:

20130105930, May 2, 2013

Filed:

Oct 27, 2011

Appl. No.:

13/283379

Inventors:

Lan Zhang - Palo Alto CA, US
Ewelina N. Lucow - Mountain View CA, US
Onur Fidaner - Sunnyvale CA, US
Michael W. Wiemer - Campbell CA, US

Assignee:

Solar Junction Corporation - San Jose CA

International Classification:

H01L 31/18
H01L 31/0216

US Classification:

257437, 438 72, 257E31119

Abstract:

A semiconductor light detection device fabrication technique is provided in which the cap etch and anti-reflection coating steps are performed in a single, self-aligned lithography module.

US Patent:

62108190, Apr 3, 2001

Filed:

Jul 24, 1998

Appl. No.:

9/122303

Inventors:

Brij Bihari Lal - Milpitas CA
Lan Zhang - Fremont CA

Assignee:

HMT Technology Corporation - Fremont CA

International Classification:

G11B 566

US Classification:

428694T

Abstract:

A longitudinal magnetic recording medium having a CrTi underlayer deposited under a substrate bias is described. The medium has improved magnetic recording properties.

US Patent:

20210273124, Sep 2, 2021

Filed:

Jul 11, 2019

Appl. No.:

17/260208

Inventors:

- Tempe AZ, US
Lan ZHANG - Palo Alto CA, US

International Classification:

H01L 31/0443
H01L 31/02
H01L 31/048
H01L 31/0725

Abstract:

Dual-depth through-wafer-via semiconductor devices and methods for fabricating dual-depth through-wafer-via semiconductor devices are disclosed. In particular, back-contact-only multijunction photovoltaic cells and the process flows for making such cells are disclosed. The dual-depth through-wafer-via multijunction photovoltaic cells include through-wafer-vias for interconnecting the front surface epitaxial layer to a contact pad on the back surface. Before etching the through-wafer-vias the substrate is thinned to less than 150 pm. The dual-depth through-wafer-vias are formed using a two-step wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers. Low-stress passivation layers are used to reduce the thermo-mechanical stress of the semiconductor devices. A bypass diode is integrated in the recess on the backside formed by the dual-depth through-wafer structure.

US Patent:

20180366598, Dec 20, 2018

Filed:

Aug 23, 2018

Appl. No.:

16/111104

Inventors:

- San Jose CA, US
Lan Zhang - Palo Alto CA, US
Sathya Chary - San Francisco CA, US
Ferran Suarez - Chandler AZ, US

International Classification:

H01L 31/0224
H01L 31/076
H01L 31/0304
H01L 31/18
H01L 31/0725
H01L 31/0687
H01L 31/0216

Abstract:

This disclosure relates to semiconductor devices and methods for fabricating semiconductor devices. Particularly, the disclosure relates to back-contact-only multijunction solar cells and the process flows for making such solar cells, including a wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers.

US Patent:

20170345955, Nov 30, 2017

Filed:

Apr 27, 2017

Appl. No.:

15/498994

Inventors:

- San Jose CA, US
Ewelina Lucow - Los Gatos CA, US
Sabeur Siala - Sunnyvale CA, US
Ferran Suarez - San Jose CA, US
Ali Torabi - Los Gatos CA, US
Lan Zhang - Palo Alto CA, US

International Classification:

H01L 31/0224
H01L 31/05
H01L 31/0304
H01L 31/0232
H01L 31/047
H01L 31/18
H01L 31/044

Abstract:

Photovoltaic cells, methods for fabricating surface mount multijunction photovoltaic cells, methods for assembling solar panels, and solar panels comprising photovoltaic cells are disclosed. The surface mount multijunction photovoltaic cells include through-wafer-vias for interconnecting the front surface epitaxial layer to a contact pad on the back surface. The through-wafer-vias are formed using a wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers.

US Patent:

20170213922, Jul 27, 2017

Filed:

Oct 24, 2016

Appl. No.:

15/332036

Inventors:

- San Jose CA, US
Lan Zhang - Palo Alto CA, US
Sathya Chary - San Francisco CA, US
Ferran Suarez - San Jose CA, US

International Classification:

H01L 31/0224
H01L 31/18
H01L 31/0216
H01L 31/0304
H01L 31/0725

Abstract:

This disclosure relates to semiconductor devices and methods for fabricating semiconductor devices. Particularly, the disclosure relates to back-contact-only multijunction solar cells and the process flows for making such solar cells, including a wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers.

US Patent:

20150206997, Jul 23, 2015

Filed:

Mar 30, 2015

Appl. No.:

14/672571

Inventors:

- SAN JOSE CA, US
MICHAEL WEST WIEMER - CAMPBELL CA, US
LAN ZHANG - PALO ALTO CA, US
EWELINA LUCOW - LOS GATOS CA, US

International Classification:

H01L 31/0224
H01L 31/0687
H01L 31/18
H01L 31/0725

Abstract:

Multi junction solar cells and methods for making multi junction solar cells are disclosed. Back-contact-only multi junction solar cells having recessed through-substrate vias wherein the side facing the sun, is capable of withstanding environments for use in space are disclosed.