Larry A Greenhouse

US Patent:

20060123377, Jun 8, 2006

Filed:

Dec 7, 2004

Appl. No.:

11/005690

Inventors:

Richard Schultz - Fort Collins CO, US
Robert Waldron - Fort Collins CO, US
Norman Mause - Fort Collins CO, US
Larry Greenhouse - San Diego CA, US

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

G06F 9/455
G06F 17/50

US Classification:

716011000, 716004000

Abstract:

A system and method for designing a complex electronic circuit by simulating blocks of the circuit using various simulators to produce a net list, designing the physical layout of the circuit using a layout tool that produces a layout verses schematic reference file, mapping the reference file to the net list to create a mapping file, and analyzing the mapping file to verify that the layout meets various criteria. Each block may be verified using simulation tools that are appropriate for that piece of the overall circuit, and using conditions that may maximize the strain on the circuit. The results from the simulations are compared to the physical layout to determine if the physical layout is able to properly conduct the electrical signals.