Larry B Thomas

US Patent:

6564340, May 13, 2003

Filed:

Nov 18, 1999

Appl. No.:

09/442702

Inventors:

Thomas A. Odegard - Albuquerque NM
Larry J. Thomas - Albuquerque NM
Bryan P. Hansen - Albuquerque NM
Aaron Levine - Rio Rancho NM

Assignee:

Honeywell International Inc. - Morristown NJ

International Classification:

G06F 1340

US Classification:

714 43, 714 5, 710316

Abstract:

This invention provides fault tolerant capability for a Versa Module Eurocards backplane system design for high reliability applications. An approach of connecting two independent backplanes together electrically, but providing isolation capabilities in the event of a failure was developed. The electrical connection or integrated bridge design provides a virtual connection between the two VME backplanes that is transparent to the end user. The integrated virtual VMEbus design provides a low latency, high bandwidth interconnect between modules whether located on the same local bus or the electrically isolateable bus. This dual-VME fault tolerant backplane design eliminates complete system failures due to single event failures.

US Patent:

56025866, Feb 11, 1997

Filed:

May 3, 1994

Appl. No.:

8/237519

Inventors:

Steven A. Schauer - Bosque Farms NM
Larry J. Thomas - Albuquerque NM

Assignee:

Honeywell Inc. - Minneapolis MN

International Classification:

H04N 1702

US Classification:

348189

Abstract:

A built-in test for dynamic raster video output is described for testing a plurality of analog video signals created from digital raster data, each of the analog signals having a plurality of analog signal components. In the apparatus, an addressing device is provided for selecting one of the analog signals to be tested, and a selector selects a desired analog signal component from the selected analog signal. An A/D converter then converts the selected signal component into a digital signal component, and a characteristic value is extracted therefrom. A memory is provided which stores predetermined characteristic value range data, and the extracted characteristic value is compared with the stored range data by a comparator to produce a result. A combination device then creates a combination of the result and an address of the selected analog signal component, and the combination is then stored for later retrieval.

US Patent:

56381379, Jun 10, 1997

Filed:

Dec 22, 1993

Appl. No.:

8/173392

Inventors:

Larry J. Thomas - Albuquerque NM

Assignee:

Honeywell Inc. - Minneapolis MN

International Classification:

H04N 557
H04N 1700
H04N 552
H04N 518

US Classification:

348673

Abstract:

A configurable video output channel architecture includes a plurality of parallel video pipelines arranged to drive a video display; a device for selecting an output of one of the video pipelines and generating a readback signal representative thereof; and a device for adjusting a display specification of at least one of the video pipelines using the readback signal. The display specification adjusted may include the maximum video level, the blanking level, and the sync level of the video waveform. The adjusting device may also adjust the characteristic impedance of each pipeline. The selecting device includes a multiplexer and an analog to digital converter, and the adjusting device includes a controller which monitors the readback signal and generates a control signal to adjust the display specification if the readback signal is outside of a desired range.

US Patent:

55194133, May 21, 1996

Filed:

Nov 19, 1993

Appl. No.:

8/155065

Inventors:

Larry J. Thomas - Albuquerque NM
Douglas E. Thorpe - Albuquerque NM

Assignee:

Honeywell Inc. - Minneapolis MN

International Classification:

G09G 500

US Classification:

345185

Abstract:

A method and apparatus for concurrently scanning and filling a memory comprised of at least a first and a second memory partition for use in a video display of the ping-pong type is provided herein. A method according to the present invention includes scanning the first memory partition and concurrently filling the second memory partition, such that a fill pattern is stored in every memory cell in the second memory partition during a time period in which a portion of memory cells in the first memory partition are scanned. A method in accordance with the invention can be incorporated into a video display system with minimal modifications to provide a fast fill or clear of a memory partition.