George E. Smith - Wappingers Falls NY Lawrence F. Wagner - Fishkill NY Timothy L. Walters - Poughkeepsie NY Fariborz Assaderaghi - Mahopac NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06G 748
US Classification:
39550035
Abstract:
A method for use in electronic design models encoded into design software for use in SOI based FET logic design includes simulation of an SOI device and setting a floating body voltage to any desired value at any time during the simulation, by adding to the model an ideal voltage source, whose value is a desired body voltage, in series with an ideal current source, whose value is a constant times the voltage across itself. When the constant is zero no current can flow, and any additional components have no effect on the circuit. When the constant is non-zero, said ideal current source appears to be the same as a resistor such that, current can flow in to or out from the body node, setting its voltage. The constant is kept zero at all times, except when it is desired to change the body voltage. The body voltage can be reset at any time to solve the problem of successive delays in one simulation run and resetting the voltage before each delay measurement starts.
Chang-Ming Hsieh - Fishkill NY Louis L. C. Hsu - Fishkill NY Ronald W. Knepper - LaGrangeville NY Lawrence F. Wagner - Fishkill NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2972
US Classification:
257559
Abstract:
A lateral bipolar transistor has an extrinsic base layer on either side of a centrally disposed emitter layer and an intrinsic base and a collector oriented perpendicularly to the extrinsic base and collector layers.
Method Of Forming A Novel Vertical-Gate Cmos Compatible Lateral Bipolar Transistor
Chang-Ming Hsieh - Fishkill NY Louis L. G. Hsu - Fishkill NY Ronald W. Knepper - LaGrangeville NY Lawrence F. Wagner - Fishkill NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21265
US Classification:
437 32
Abstract:
A transistor with silicon on insulator (SOI) intrinsic base and a collector each formed by a low temperature epitaxial process and each orientated vertically with respect to the (SOI) substrate. The base width can be as narrow as in a conventional vertical transistor. Similarly, the collector width can be precisely controlled.
George E. Smith - Wappingers Falls NY Fariborz Assaderaghi - Mahopac NY Paul D. Muench - Poughkeepsie NY Lawrence F. Wagner - Fishkill NY Timothy L. Walters - Poughkeepsie NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06G 748
US Classification:
703 14
Abstract:
A method for use in electronic design models encoded into design software for use in SOI based FET logic design includes simulation of an SOI device by and setting a floating body voltage to any desired value at any time during the simulation, by adding to the model an ideal voltage source, whose value is a desired body voltage, in series with an ideal current source, whose value is a constant times the voltage across itself. When the constant is zero, no current can flow, and any additional components have no effect on the circuit. When the constant is non-zero, said ideal current source appears to be the same as a resistor such that current can flow in to or out from the body node, setting its voltage. The constant is kept zero at all times, except when it is desired to change the body voltage. The body voltage can be reset at any time to solve the problem of successive delays in one simulation run and resetting the voltage before each delay measurement starts.
Chang-Ming Hsieh - Fishkill NY Louis L. G. Hsu - Fishkill NY Ronald W. Knepper - LaGrangeville NY Lawrence F. Wagner - Fishkill NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2970
US Classification:
257559
Abstract:
A transistor with silicon on insulator (SOI) intrinsic base and a collector each formed by a low temperature epitaxial process and each orientated vertically with respect to the (SOI) substrate. The base width can be as narrow as in a conventional vertical transistor. Similarly, the collector width can be precisely controlled.
Chang-Ming Hsieh - Fishkill NY Louis L. Hsu - Fishkill NY Phung T. Nguyen - Poughkeepsie NY Lawrence F. Wagner - Fishkill NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2948 H01L 2956
US Classification:
257471
Abstract:
An integrated gate and semiconductor barrier layer diode which functions as a regular diode when the gate is turned off and as, a Schottky barrier diode with the gate turned on.