Lee Mei Yang

US Patent:

7710896, May 4, 2010

Filed:

Dec 19, 2006

Appl. No.:

11/612847

Inventors:

Fred Bauer - Burlingame CA, US
Peter Cnudde - Sunnyvale CA, US
Lee Yang - Campbell CA, US

Assignee:

SRI International - Menlo Park CA

International Classification:

H04L 1/00

US Classification:

370253

Abstract:

A network processing device calculates variable link metrics and then prioritizes selection of network links for sending packets according to the calculated variable link metrics. The variable link metrics can include a link capacity index that represents a combination of platform and interface capabilities for nodes on opposite ends of the network links. The link metrics can also include an expected retransmission value that indicates the percentage of packets that may have to be transmitted over different links.

US Patent:

54443970, Aug 22, 1995

Filed:

Oct 5, 1994

Appl. No.:

8/318238

Inventors:

Anthony Y. Wong - Saratoga CA
David Kwong - Fremont CA
Lee Yang - Cupertino CA
Charles Hsiao - Fremont CA

Assignee:

Pericom Semiconductor Corp. - San Jose CA

International Classification:

H03K 190175
H03K 1902

US Classification:

326 81

Abstract:

An all-CMOS output buffer drives a bus that can operate at 3 volts and 5 volts. When in a high-impedance state, the output buffer draws little or no current. If the bus is driven to 5 volts by an external device, the high impedance output buffer is in danger of latch-up and distortion of the bus logic level since it only has a 3-volt power supply and does not use a charge pump or an extra 5-volt supply. A biasing circuit couples an N-well that contains p-channel transistors and a driver transistor to the bus driven to 5 volts. Thus the N-well is also driven to 5 volts, the voltage on the bus. The gate of the p-channel driver transistor in the high-impedance output buffer is also coupled to the N-well by another p-channel transistor, raising the gate potential to 5 volts. Thus the gate and body of the p-channel driver transistor is at 5 volts, eliminating reversing current and latch-up problems. A transmission gate isolates the gate of the p-channel driver transistor from the rest of the device's circuitry.

US Patent:

20220245525, Aug 4, 2022

Filed:

Apr 22, 2022

Appl. No.:

17/726910

Inventors:

- Basking Ridge NJ, US
Erik Ordentlich - San Jose CA, US
Lee Yang - Campbell CA, US
Peter Cnudde - Los Altos CA, US

International Classification:

G06N 20/00
H04L 67/10

Abstract:

The present teaching relates to estimating one or more parameters on a system including a plurality of nodes. In one example, the system comprises: one or more learner nodes, each of which is configured for generating information related to a group of words for estimating the one or more parameters associated with a machine learning model; and a plurality of server nodes, each of which is configured for obtaining a plurality of sub-vectors each of which is a portion of a vector that represents a word in the group of words, updating the sub-vectors based at least partially on the information to generate a plurality of updated sub-vectors, and estimating at least one of the one or more parameters associated with the machine learning model based on the plurality of updated sub-vectors.

US Patent:

20210049507, Feb 18, 2021

Filed:

Aug 28, 2020

Appl. No.:

17/005592

Inventors:

- New York NY, US
Erik Ordentlich - San Jose CA, US
Lee Yang - Campbell CA, US
Peter Cnudde - Los Altos CA, US

International Classification:

G06N 20/00
H04L 29/08

Abstract:

The present teaching relates to estimating one or more parameters on a system including a plurality of nodes. In one example, the system comprises: one or more learner nodes, each of which is configured for generating information related to a group of words for estimating the one or more parameters associated with a machine learning model; and a plurality of server nodes, each of which is configured for obtaining a plurality of sub-vectors each of which is a portion of a vector that represents a word in the group of words, updating the sub-vectors based at least partially on the information to generate a plurality of updated sub-vectors, and estimating at least one of the one or more parameters associated with the machine learning model based on the plurality of updated sub-vectors.

US Patent:

20170300828, Oct 19, 2017

Filed:

Apr 14, 2016

Appl. No.:

15/098415

Inventors:

- Sunnyvale CA, US
Erik Ordentlich - San Jose CA, US
Lee Yang - Campbell CA, US
Peter Cnudde - Los Altos CA, US

International Classification:

G06N 99/00
G06N 5/04
G06N 7/00
H04L 29/08

Abstract:

The present teaching relates to estimating one or more parameters on a system including a plurality of nodes. In one example, the system comprises: one or more learner nodes, each of which is configured for generating information related to a group of words for estimating the one or more parameters associated with a machine learning model; and a plurality of server nodes, each of which is configured for obtaining a plurality of sub-vectors each of which is a portion of a vector that represents a word in the group of words, updating the sub-vectors based at least partially on the information to generate a plurality of updated sub-vectors, and estimating at least one of the one or more parameters associated with the machine learning model based on the plurality of updated sub-vectors.