A computer-peripheral interface includes a latch to receive parallel data from a peripheral, such as a cash register, with a hardware mask to reject irrelevant data, a simple FIFO memory and a parallel-serial converter for transmission to a controlling computer. These devices are controlled by a combination of five one-shots for timing, and a D flip-flop and gates. The problem of controlling a variety of peripherals, such as cash registers, by a central computer without also incorporating microprocessors or equivalent complicated devices in each peripheral yet still providing sufficient data handling capacity is solved.
Method Of Interfacing Peripheral Devices With A Central Processor
A method of interfacing peripheral digital information gathering devices with a computer includes the positioning of an interface module with each peripheral device and obtaining information therefrom in series of N-bit words. Thereafter each such series of words is stored in the interface modules. Thereafter, words in the interface modules to be disregarded are electronically masked, and the output of non-masked words are stored in a memory. The memory is provided with a not-empty indicator adapted to block further input from the peripheral when the memory has words in storage. Thereupon, communication of the non-disregarded memory words occurs to the computer. The method also includes the usage of parallel-to-serial converters within each interface module to thus enable parallel data generated by the peripheral to be received in memory as serial data.