Li Ye Chen

US Patent:

20230031591, Feb 2, 2023

Filed:

Jun 29, 2022

Appl. No.:

17/853176

Inventors:

- Santa Clara CA, US
Ignacio Javier Alvarez - Portland OR, US
Li Chen - Hillsboro OR, US
Javier Felip Leon - Hillsboro OR, US
David Israel Gonzalez Aguirre - Hillsboro OR, US
Justin Gottschlich - Santa Clara CA, US
Javier Sebastian Turek - Beaverton OR, US

International Classification:

G06F 16/9032
G06F 16/2457
G06F 16/9038

Abstract:

Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.

US Patent:

20200364337, Nov 19, 2020

Filed:

Aug 3, 2020

Appl. No.:

16/983468

Inventors:

- Santa Clara CA, US
Li Chen - Hillsboro OR, US

International Classification:

G06F 21/56
G06N 20/00

Abstract:

Systems and methods may be used to classify incoming testing data, such as binaries, function calls, an application package, or the like, to determine whether the testing data is contaminated using an adversarial attack or benign while training a machine learning system to detect malware. A method may include using a sparse coding technique or a semi-supervised learning technique to classify the testing data. Training data may be used to represent the testing data using the sparse coding technique or to train the supervised portion of the semi-supervised learning technique.

US Patent:

20200028865, Jan 23, 2020

Filed:

May 23, 2019

Appl. No.:

16/421044

Inventors:

- Santa Clara CA, US
Li Chen - Hillsboro OR, US

International Classification:

H04L 29/06
G06N 20/00
G06N 5/00

Abstract:

Systems and methods may be used to prevent attacks on a malware detection system. A method may include modeling a time series of directed graphs using incoming binary files during training of a machine learning system and detecting, during a time-window of the time series, an anomaly based on a directed graph of the time series of directed graphs. The method may include providing an alert that the anomaly has corrupted the machine learning system. The method may include preventing or remedying corruption of the machine learning system.

US Patent:

20190324744, Oct 24, 2019

Filed:

Jun 28, 2019

Appl. No.:

16/457006

Inventors:

- Santa Clara CA, US
David I. Gonzalez Aguirre - Hillsboro OR, US
Shengtian Zhou - Palo Alto CA, US
Justin Gottschlich - Santa Clara CA, US
Li Chen - Hillsboro OR, US

International Classification:

G06F 8/71
G06F 8/75
G06F 8/77
G06N 3/04
G06F 17/28
G06F 16/906
G06F 16/9035
G06F 17/11

Abstract:

Apparatus, systems, articles of manufacture, and methods for a context and complexity-aware recommendation system for efficient software development. An example apparatus includes a current state generator to generate a representation of a current state of a new function, an instruction predictor to generate a first recommended software component based on the current state of the new function, a complexity cost determiner to rank the first recommended software component based on a weighted sum of associated partial cost values, the software component to be ranked against second recommended software components based on a comparison of partial cost values corresponding to respective ones of the second recommended software components, a risk identifier to detect vulnerabilities based on an attack surface of a portion of the first recommended software component, and a ranking determiner to generate a third recommended software component, the third recommended software component corresponding to respective ranking metrics.

US Patent:

20190317965, Oct 17, 2019

Filed:

Jun 28, 2019

Appl. No.:

16/457203

Inventors:

- Santa Clara CA, US
Ignacio Javier Alvarez - Portland OR, US
Li Chen - Hillsboro OR, US
Javier Felip Leon - Hillsboro OR, US
David Israel Gonzalez Aguirre - Hillsboro OR, US
Justin Gottschlich - Santa Clara CA, US
Javier Sebastian Turek - Beaverton OR, US

International Classification:

G06F 16/9032
G06F 16/9038
G06F 16/2457

Abstract:

Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.

US Patent:

20190228155, Jul 25, 2019

Filed:

Mar 29, 2019

Appl. No.:

16/370849

Inventors:

Abhishek Basak - Hillsboro OR, US
Li Chen - Hillsboro OR, US
Salmin Sultana - Hillsboro OR, US
Erdem Aktas - Beaverton OR, US
Saeedeh Komijani - Mountain View CA, US

International Classification:

G06F 21/56
G06F 12/1027
G06F 21/55
G06N 20/00

Abstract:

Methods, apparatus, systems and articles of manufacture are disclosed for anomalous memory access pattern detection for translational lookaside buffers. An example apparatus includes a communication interface to retrieve a first eviction data set from a translational lookaside buffer associated with a central processing unit; a machine learning engine to: generate an anomaly detection model based upon at least one of a second eviction data set not including an anomaly and a third eviction data set including the anomaly; and determine whether the anomaly is present in the first eviction data set based on the anomaly detection model; and an alert generator to at least one of modify a bit value or terminate memory access operations when the anomaly is determined to be present.

US Patent:

20190163900, May 30, 2019

Filed:

Jan 11, 2019

Appl. No.:

16/246187

Inventors:

- Santa Clara CA, US
Jason Martin - Beaverton OR, US
Justin Gottschlich - Santa Clara CA, US
Salmin Sultana - Hillsboro OR, US
Li Chen - Hillsboro OR, US
Wei Li - Hillsboro OR, US
Priyam Biswas - West Lafayette IN, US
Paul Carlson - Hillsboro OR, US

International Classification:

G06F 21/52
G05B 23/02
G06N 20/00
G06F 21/51

Abstract:

Methods, systems, articles of manufacture and apparatus to detect process hijacking are disclosed herein. An example apparatus to detect control flow anomalies includes a parsing engine to compare a target instruction pointer (TIP) address to a dynamic link library (DLL) module list, and in response to detecting a match of the TIP address to a DLL in the DLL module list, set a first portion of a normalized TIP address to a value equal to an identifier of the DLL. The example apparatus disclosed herein also includes a DLL entry point analyzer to set a second portion of the normalized TIP address based on a comparison between the TIP address and an entry point of the DLL, and a model compliance engine to generate a flow validity decision based on a comparison between (a) the first and second portion of the normalized TIP address and (b) a control flow integrity model.

US Patent:

20190130096, May 2, 2019

Filed:

Dec 27, 2018

Appl. No.:

16/234085

Inventors:

Li Chen - Hillsboro OR, US
Kai Cong - Hillsboro OR, US
Salmin Sultana - Hillsboro OR, US

International Classification:

G06F 21/55
G06N 20/00

Abstract:

The present disclosure is directed to systems and methods of detecting a side-channel attack using hardware counter anomaly detection circuitry to select a subset of HPCs demonstrating anomalous behavior in response to a side-channel attack. The hardware counter anomaly detection circuitry includes data collection circuitry to collect data from a plurality of HPCs, time/frequency domain transform circuitry to transform the collected data to the frequency domain, one-class support vector anomaly detection circuitry to detect anomalous or aberrant behavior by the HPCs. The hardware counter anomaly detection circuitry selects the HPCs having reliable and consistent anomalous activity or behavior in response to a side-channel attack and groups those HPCs into a side-channel attack detection HPC sub-set that may be communicated to one or more external devices.