Liang Chen

US Patent:

20070040516, Feb 22, 2007

Filed:

Aug 15, 2005

Appl. No.:

11/204307

Inventors:

Liang Chen - McKinney TX, US

International Classification:

H05B 41/36

US Classification:

315291000

Abstract:

An AC-to-DC converter with PFC or without PFC generates an output constant voltage at any predetermined value (no matter less or more than input line peak voltage, or even equal to input line peak voltage) with an input line AC voltage with wide range (Typical sinusoidal 110 VAC, 60 Hz or 220 VAC, 50 Hz). It is mainly used as power supply for lamp. Previous power supply for lamp has low frequency component or high frequency component. (1) Low frequency light cause eyes pupil and crystalline lens will adjust 60 times, 120 or many times per second to cause eyes tired. Pupil open wide and crystalline lens adjust to collect more light to focus on retina for seeing clearly at weak light while pupil open narrow and crystalline lens adjust to collect less light to focus on retina at strong light to prevent retina from strong light harm and hurt. In the long run, muscles to control pupil and crystalline lens become very tired and become flabby. Then the muscle can't adjust pupil and crystalline according to distance and brightness so that myopia is caused. (2) High frequency voltage causes lamp brightness changes too fast. Eyes can not adjust fast enough to follow the brightness change of lamp for high frequency voltage. But high frequency large current on the secondary cause high EMI that has risk to harm people's health. High frequency light causes EMI issue. Peoples' eyes can't keep up with high frequency light. Peak strong light shine on the retina for pupil can't shrink at high frequency light. In the long run, retina will be harmed and affect eyesight is affected, cornea dryness or crystalline lens opacity is caused. My invention of power supply lamp has only DC constant voltage on lamp. Lamp's brightness is constant and has no low frequency or high frequency component Thus peoples' eyes and health are protected to maximum extent. The output voltage is regulated at predetermined DC constant value by feedback. You can adjust feedback potentiometer value to set output voltage. Potentiometer and resistor voltage divider with auxiliary winding, (opto-coupler, digital isolator or direct feedback) compose the dimming feedback circuit. It is convenient to adjust the brightness of lamp for eyes' comfort by adjusting the potentiometer resistance value. My invention can be used directly on second category lamp that doesn't need high voltage with ballast to start the lamp. Most of them use heat generated by filament or diode etc to create light. Such as Halogen, Incandescent, LED, PAR lamp, miniature sealed beam lamp, Projection lamp, automotive lamp, some stage and studio lamp, DC fluorescent lamp etc. The converter realized pulse-by-pulse or other current limit protection by sense the current sense resistor or signal transformer. One stage DC sinusoidal to DC constant converter can be implemented by all kinds of topologies other than the following topologies as long as they can convert DC sinusoidal voltage to DC constant voltage. Buck, Boost, Buck-boost, Noninverting buck-boost ,H-Bridge, Watkins-Johnson, Current-fed bridge, Inverse of Watkins-Johnson, Cuk, SEPIC, Inverse of SEPIC, Buck square, full bridge, half bridge, Forward, Two-transistor Forward, Push-pull, Flyback, Push-pull converter basedon Watkins-Johnson, Isolated SEPIC, Isolated Inverse SEPIC, Isolated Cuk, Two-transistor Flyback etc One stage AC to DC converter can be realized by discrete components without controller , active startup circuit, feedback circuit or sample circuit. Main switch and active startup circuit can be integrated in IC controller. The AC to DC converter is not used only for lamp. It is can also be used for any device requires DC power supply in all the industrial areas. (Telecommunication, Storage, Personal computer, cell phone power supply and charger, video game etc) For example, Bus AC to DC converter, PFC converter, PFC converter for lighting Computer power supply, Monitor power supply, notebook adapter, LCD TV, AC/DC adapter, adjusted voltage charger, Power tool charger, Electronic ballast, Video game power supply etc.

US Patent:

20070138971, Jun 21, 2007

Filed:

Feb 15, 2007

Appl. No.:

11/706645

Inventors:

Liang Chen - McKinney TX, US

International Classification:

H05B 39/04

US Classification:

31520900R

Abstract:

An AC-to-DC voltage converter as power supply for lamp converts an AC input voltage to a constant DC voltage at predetermined value set by potentiometer. The converter includes input power supply input protection circuit EMI filter rectifier filter converter output filter lamp start circuit control circuit biasing circuit sampling circuit output protection circuit feedback and dimming circuit and input monitor circuit This version is a flyback converter; versions from other topologies etc are also provided. The converter has feedback function that can regulate output voltage at predetermined value. The converter has dimming function and can adjust lamp brightness for conformability. The output constant brightness decreases peoples' eyes fatigue to minimum level.

US Patent:

20120268039, Oct 25, 2012

Filed:

Apr 20, 2011

Appl. No.:

13/066626

Inventors:

Liang Chen - Lake Oswego OR, US

International Classification:

H05B 41/282
H02M 7/757
H02M 3/335

US Classification:

315308, 363 2112, 363 79

Abstract:

A power supply and methods are provided. In one implementation, the power supply includes a switching converter with power feedback circuit to output constant power to keep lamp at constant brightness. The power feedback circuits include a current feedback circuit and a voltage feedback circuit. The power supply further includes a controller operable to adjust on time or duty cycle of main switch to keep the output power constant.

US Patent:

20220180918, Jun 9, 2022

Filed:

Dec 9, 2020

Appl. No.:

17/116634

Inventors:

- Boise ID, US
Liang Chen - Allen TX, US

International Classification:

G11C 11/4096
G11C 11/4076
G06F 3/06

Abstract:

A host device and memory device perform internal write leveling of a data strobe with a write command. The memory device includes an input-output interface that receives the data strobe from the host device. The memory device also includes internal write circuitry configured to launch an internal write signal. The internal write circuitry includes an emulation loop configured to emulate circuitry in a clock path of a write clock generated from the clock and used to generate a feedback clock. The internal write circuitry includes a write delay lock loop configured to receive the write clock and the feedback clock to determine a number of cycles used for the loop, transmit the number of cycles to the host device to be used as a cycle adjust in an internal write leveling process, and complete the internal write leveling process with the host device using the cycle adjust.

US Patent:

20230108373, Apr 6, 2023

Filed:

Sep 30, 2021

Appl. No.:

17/491422

Inventors:

- Boise ID, US
Liang Chen - Allen TX, US

International Classification:

G11C 11/4076

Abstract:

Systems and methods for gating, via clock gating circuitry, a clock signal based at least in part on a mode register value indicative of synchronization of a command address signal with the clock signal when the mode register value indicates synchronization of the command address signal with the clock signal has not occurred. The clock gating circuitry is configured to, gate the clock signal based at least in part on the mode register value and a chip select signal value when the mode register value indicates synchronization of the command address signal with the clock signal has occurred.

US Patent:

20200082856, Mar 12, 2020

Filed:

Nov 13, 2019

Appl. No.:

16/683018

Inventors:

- Boise ID, US
Liang Chen - Allen TX, US
David R. Brown - Lucas TX, US

International Classification:

G11C 7/22
G11C 7/10
G11C 11/4074
G06F 13/18
H04L 25/03
G11C 11/4096
G11C 8/10
G11C 8/18
G11C 11/4093
G11C 11/4076

Abstract:

Methods and devices include an input buffer configured to receive data. Decision feedback equalizer (DFE) circuitry includes a DFE configured to interpret levels of the data from the input buffer and a DFE buffer that stores previous values to control the DFE based on the previous values. Moreover, the DFE circuitry also includes reset circuitry configured to reset the DFE buffer to an initial state. Furthermore, the DFE circuitry includes suppression circuitry configured to suppress resets using the reset circuitry for an interval between write operations to the memory device.

US Patent:

20190391763, Dec 26, 2019

Filed:

Aug 7, 2019

Appl. No.:

16/534846

Inventors:

- Boise ID, US
Liang Chen - Allen TX, US

International Classification:

G06F 3/06
G11C 11/4076
G11C 11/4096
G11C 11/408

Abstract:

A host device and memory device function together to perform internal write leveling of a data strobe with a write command within the memory device. The memory device includes a command interface configured to receive write commands from the host device. The memory device also includes an input-output interface configured to receive the data strobe from the host device. The memory device also includes internal write circuitry configured to launch an internal write signal based at least in part on the write commands. The launch of the internal write signal is based at least in part on an indication from the host device that indicates when to launch the internal write signal relative to a cas write latency (CWL) for the memory device.

US Patent:

20190348081, Nov 14, 2019

Filed:

Jun 20, 2019

Appl. No.:

16/446876

Inventors:

- Boise ID, US
Liang Chen - Allen TX, US

International Classification:

G11C 5/06
H01L 25/065
G11C 5/02
H01L 23/48

Abstract:

A memory device includes active circuitry configured to process a segment set that corresponds to a source data, wherein: the source data comprises information corresponding to a device operation, the source data having a block length representing a number of bits therein, and the segment set includes at least a first segment and a second segment, the first segment and the second segment each including number of bits less than the block length; and a set of die pads coupled to the active circuitry and configured to communicate the segment set for operating a second device, wherein the set includes a number of die pads less than the block length.