Lin Hu

US Patent:

20180211869, Jul 26, 2018

Filed:

Mar 20, 2018

Appl. No.:

15/926274

Inventors:

- Armonk NY, US
Cheng Chi - Jersey City NJ, US
Lin Hu - Cohoes NY, US
Kafai Lai - Poughkeepsie NY, US
Chi-Chun Liu - Altamont NY, US
Jed W. Pitera - Portola Valley CA, US

International Classification:

H01L 21/768
H01L 21/02
G06F 17/50
H01L 23/528
H01L 23/522

Abstract:

A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.

US Patent:

20180012795, Jan 11, 2018

Filed:

Jul 11, 2016

Appl. No.:

15/206789

Inventors:

- Armonk NY, US
Cheng Chi - Jersey City NJ, US
Lin Hu - Cohoes NY, US
Kafai Lai - Poughkeepsie NY, US
Chi-Chun Liu - Altamont NY, US
Jed W. Pitera - Portola Valley CA, US

International Classification:

H01L 21/768
H01L 21/02
G06F 17/50
H01L 23/528
H01L 23/522

Abstract:

A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.