Linh T Truong

US Patent:

6393489, May 21, 2002

Filed:

Jun 13, 2000

Appl. No.:

09/594745

Inventors:

Namakkal S. Sambamurthy - San Jose CA
Devendra K. Tripathi - San Jose CA
Alak K. Deb - San Jose CA
Linh Tien Truong - San Jose CA
Praveen D. Kumar - Fremont CA

Assignee:

Vitesse Semiconductor Corporation - Camarillo CA

International Classification:

G06F 1516

US Classification:

709250, 370463

Abstract:

Disclosed is a media access controller for transferring data along a computer network. The media access controller includes a transmit media access controller that is configured to process out-going packet data received from an upper layer for transmission to a lower layer. A receive media access controller that is configured to process in-coming packet data received from the lower layer for transmission to the upper layer. A transmit multi-packet queue FIFO for receiving the out-going packet data from the upper layer before being passed to the transmit media access controller. A receive multi-packet queue FIFO for receiving the in-coming packet data that is received by the receive media access controller. The media access controller further including a media access controller manager interfacing with the transmit and receive media access controllers. The media access controller manager being responsible for managing the flow of packet data through the transmit and receive multi-packet queue FIFOs.

US Patent:

60761156, Jun 13, 2000

Filed:

Apr 24, 1997

Appl. No.:

8/845272

Inventors:

Namakkal S. Sambamurthy - San Jose CA
Devendra K. Tripathi - San Jose CA
Alak K. Deb - San Jose CA
Linh Tien Truong - San Jose CA
Praveen D. Kumar - Fremont CA

Assignee:

XAQTI Corporation - Santa Clara CA

International Classification:

G06F 1300

US Classification:

709250

Abstract:

Disclosed is a media access controller configured to communicate with an upper layer and a lower physical layer. The media access controller includes a receive controller for receiving and processing receive data requests from the lower layer and transferring received data to the upper layer. The method includes receiving data from the lower layer and processing the received data through the receive controller. The processor being performed in accordance with a setting of a plurality of control registers associated with the transmit controller. The method further including receiving a control signal for modifying at least one of the plurality of control registers while the data is being processed through the receive controller. Altering the processing of data being processed within the receive controller based on the modification of the at least one of the plurality of control registers associated with the receive controller, and transferring the processed data to the upper layer.

US Patent:

61087130, Aug 22, 2000

Filed:

Apr 24, 1997

Appl. No.:

8/845562

Inventors:

Namakkal S. Sambamurthy - San Jose CA
Devendra K. Tripathi - San Jose CA
Alak K. Deb - San Jose CA
Linh Tien Truong - San Jose CA
Praveen D. Kumar - Fremont CA

Assignee:

Xaqti Corporation - San Jose CA

International Classification:

G06F 1516

US Classification:

709250

Abstract:

Disclosed is a media access controller for transferring data along a computer network. The media access controller includes a transmit media access controller that is configured to process out-going packet data received from an upper layer for transmission to a physical layer. A receive media access controller that is configured to process in-coming packet data received from the physical layer for transmission to the upper layer. A transmit multi-packet queue FIFO for receiving the out-going packet data from the upper layer before being passed to the transmit media access controller. A receive multi-packet queue FIFO for receiving the in-coming packet data that is received by the receive media access controller. The media access controller further including a media access controller manager interfacing with the transmit and receive media access controllers. The media access controller manager being responsible for managing the flow of packet data through the transmit and receive multi-packet queue FIFOs.

US Patent:

60852488, Jul 4, 2000

Filed:

Apr 24, 1997

Appl. No.:

8/845563

Inventors:

Namakkal S. Sambamurthy - San Jose CA
Devendra K. Tripathi - San Jose CA
Alak K. Deb - San Jose CA
Linh Tien Truong - San Jose CA
Praveen D. Kumar - Fremont CA

Assignee:

Xaqtu Corporation - San Jose CA

International Classification:

G06F 1516

US Classification:

709229

Abstract:

Disclosed is a transmit media access controller having a transmit interface unit configured to receive packet data, transfer control signals and control information from an upper layer. The transmit media access controller also includes a transmit controller for processing the packet data based on the control information received from the upper layer. The transmit control block is bi-directionally coupled to the transmit interface unit. While the packet data is being processed, new control information may be received by the in communication with the transmit controller. The transmit media access controller further includes an interface unit configured to receive packet data from the transmit cyclic redundancy check unit before being transmitted to a physical layer.

US Patent:

20200218460, Jul 9, 2020

Filed:

Mar 23, 2020

Appl. No.:

16/827585

Inventors:

- San Jose CA, US
Linh Tien TRUONG - San Jose CA, US

International Classification:

G06F 3/06

Abstract:

Disclosed is a system and method for providing host adjustable performance parameters for SSDs. The method includes accessing a latency profile based on a determined device age of a solid state drive (SSD). The method also includes providing for display a user interface comprising a plurality of interface elements to adjust a respective plurality of performance specifications of the SSD, wherein the user interface is configured based on the latency profile. The method also includes receiving, via the user interface, an adjustment to the plurality of performance specifications. The method also includes sending an instruction to the SSD to configure the SSD with a parameter set based on the adjusted plurality of performance specifications.

US Patent:

20190243567, Aug 8, 2019

Filed:

Mar 13, 2018

Appl. No.:

15/920422

Inventors:

- San Jose CA, US
Linh Tien Truong - San Jose CA, US

International Classification:

G06F 3/06

Abstract:

Disclosed is a system and method for providing host adjustable performance parameters for SSDs. The method includes accessing a latency profile based on a determined device age of a solid state drive (SSD). The method also includes providing for display a user interface comprising a plurality of interface elements to adjust a respective plurality of performance specifications of the SSD, wherein the user interface is configured based on the latency profile. The method also includes receiving, via the user interface, an adjustment to the plurality of performance specifications. The method also includes sending an instruction to the SSD to configure the SSD with a parameter set based on the adjusted plurality of performance specifications.

US Patent:

20180060230, Mar 1, 2018

Filed:

Aug 25, 2016

Appl. No.:

15/247910

Inventors:

- Plano TX, US
Linh Truong - San Jose CA, US
Deepanshu Dutta - San Jose CA, US

Assignee:

SanDisk Technologies LLC - Plano TX

International Classification:

G06F 12/02

Abstract:

Apparatuses, systems, methods, and computer program products are disclosed for annealing non-volatile memory. A controller identifies one or more life cycle characteristics of a non-volatile storage element. The controller selects an anneal duration and an anneal temperature for annealing the non-volatile storage element. The anneal duration and the anneal temperature are based on the one or more life cycle characteristics. The controller anneals the non-volatile storage element using the selected anneal duration and anneal temperature.

US Patent:

20170220269, Aug 3, 2017

Filed:

Apr 11, 2017

Appl. No.:

15/485158

Inventors:

- Plano TX, US
Linh Tien Truong - San Jose CA, US

International Classification:

G06F 3/06

Abstract:

Systems, methods, and/or devices are used to implement variable bit encoding to improve device endurance and extend life of storage devices. In some embodiments, the method includes determining a current endurance metric for a plurality of non-volatile memory portions configured to store data encoded in a first encoding format and determining an estimated endurance metric for the plurality of non-volatile memory portions (e.g., corresponding to estimated endurance after reconfiguration of the one or more portions to store data encoded in a second encoding format), and in accordance with a determination that reconfiguration criteria are satisfied (e.g., the estimated endurance metric comprises an improvement over the current endurance metric), reconfiguring the one or more portions to store data encoded in the second encoding format.