Lisa C Grenier

US Patent:

6801202, Oct 5, 2004

Filed:

Jun 28, 2001

Appl. No.:

09/894484

Inventors:

Scott R. Nelson - Pleasanton CA
Lisa Grenier - San Jose CA
Michael F. Deering - Los Altos CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 1516

US Classification:

345505, 345502, 345504, 345506, 712 10, 712 16, 712 18, 712 23

Abstract:

A method and computer graphics system capable of implementing multiple pipelines for the parallel processing of graphics data. For certain data, a requirement may exist that the data be processed in order. The graphics system may use a set of tokens to reliably switch between ordered and unordered data modes. Furthermore, the graphics system may be capable of super-sampling and performing real-time convolution. In one embodiment, the computer graphics system may comprise a graphics processor, a sample buffer, and a sample-to-pixel calculation unit. The graphics processor may be configured to receive graphics data and to generate a plurality of samples for each of a plurality of frames. The sample buffer, which is coupled to the graphics processor, may be configured to store the samples. The sample-to-pixel calculation unit is programmable to generate a plurality of output pixels by filtering the rendered samples using a filter.

US Patent:

6895458, May 17, 2005

Filed:

Mar 4, 2002

Appl. No.:

10/090491

Inventors:

Ewa M. Kubalska - San Jose CA, US
Lisa Grenier - San Jose CA, US
Yan Yan Tang - Mountain View CA, US
Elena M. Ing - Sunnyvale CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F013/00

US Classification:

710110, 710113, 345503

Abstract:

A system for managing the control of a bi-directional data bus between a master unit and a slave unit. The master couples to the slave through a request opcode bus, a reply opcode bus and the data bus. If the master is in a bus driving state (with respect to the data bus) and receives a read request, the master relinquishes bus control and sends a read request through the request opcode bus. The slave unit assumes bus control and sends the requested data through the data bus. If the master is in a bus sensing state and receives a write request, the master sends a last read opcode to the slave via the request opcode bus, and waits for the slave to return a special token through the reply opcode bus. Upon receiving the special token the master unit assumes bus control and performs the write transaction.

US Patent:

6925520, Aug 2, 2005

Filed:

May 31, 2001

Appl. No.:

09/871277

Inventors:

James H. Ma - San Jose CA, US
Lisa C. Grenier - San Jose CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F013/00

US Classification:

710317, 710311, 710241, 710244

Abstract:

A crossbar switch is disclosed. The crossbar switch comprises a plurality of input sorting units and a plurality of merge and interleave units. Each input sorting unit is capable of receiving from a respective device an access request to any one of a plurality of physical memory devices. Each merge and interleave unit is capable of arbitrating among competing access requests received from any of the input sorting units, selecting one of the competing access requests and forwarding the selected request for implementation on a respective memory device. Also disclosed is method implemented by the crossbar switch.

US Patent:

6985153, Jan 10, 2006

Filed:

Jul 15, 2002

Appl. No.:

10/195861

Inventors:

Elisa Rodrigues - Union City CA, US
Lisa C. Grenier - San Jose CA, US
Nimita J. Taneja - Castro Valley CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 13/18

US Classification:

345535

Abstract:

A graphics system comprising a scheduling network, a sample buffer and a plurality of filtering units. The sample buffer is configured to store sample generated by a rendering engine. The plurality of filtering units are coupled in a linear series. Each filtering unit of the linear series is configured to send a request for a scanline of sample bins to a first filtering unit of the linear series. The first filtering unit is configured to service the scanline requests by sending burst requests to a scheduling network and coordinating the flow of samples forming the bursts from the sample buffer to the filtering units.

US Patent:

20020188811, Dec 12, 2002

Filed:

May 31, 2001

Appl. No.:

09/870818

Inventors:

James Ma - San Jose CA, US
Lisa Grenier - San Jose CA, US

International Classification:

G06F012/00

US Classification:

711/151000, 711/167000

Abstract:

A technique for arbitrating and selecting one access request to a shared memory from among multiple contenders is disclosed. In a first aspect, the invention includes a method for accessing a shared memory. The method includes receiving a plurality of access requests; presenting a plurality of characteristics for each access request; ascertaining a plurality of operational characteristics; and selecting one of the access requests for processing upon consideration of the access request characteristics and the operational characteristics. In a second aspect, the invention includes an arbitration and select logic (“ASL”) unit. The ASL unit comprises a plurality of input sorting units, each input sorting unit capable of receiving a respective access request and a merge and interleave unit (“MIU”). The MIU is capable of receiving a plurality of characteristics for each access request; receiving a plurality of operational characteristics; and selecting one of the access requests for processing upon consideration of the access request characteristics and the operational characteristics.