Loc V Tran

US Patent:

56597738, Aug 19, 1997

Filed:

Nov 14, 1990

Appl. No.:

7/612738

Inventors:

Duy Quoc Huynh - Boca Raton FL
Loc Tien Tran - Boca Raton FL
Raymond Roger Trombly - Boca Raton FL
Prabhakara Rao Vadapalli - Boca Raton FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 300
G06F 902

US Classification:

395821

Abstract:

This invention relates to personal computers, and to the handling of input/output signals exchanged between a microprocessor included within a personal computer and devices remote from the microprocessor. In addition to the microprocessor and a system board mounting the microprocessor, a personal computer in accordance with this invention has an input/output signal processing circuit for performing logical operations on digital signals passing to and from the microprocessor and preparing such signals for operative communication between the microprocessor and devices remote from the microprocessor, a second circuit board for mounting the circuit, a board connector mounting the second circuit board on the system board, an input/output connector for passing signals to and from the circuit for receipt from and delivery to devices remote from the microprocessor, and a signal communicating member extending between the circuit and the input/output connector for operatively communicating signals therebetween.

US Patent:

52934934, Mar 8, 1994

Filed:

Oct 27, 1989

Appl. No.:

7/428259

Inventors:

Bruce A. Smith - Jupiter FL
Loc T. Tran - Boca Raton FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1300

US Classification:

395325

Abstract:

A logic controlled gate is inserted in the arbitration logic of a computer system that supports multiple masters on a data bus. In such a system with arbitration for data bus ownership, the gate is so controlled that competitors for the data bus cannot force the main processor (CPU) from the data bus until certain system conditions are met. In particular, a pattern of CPU "hits" to memory cache is recognized as an opportunity for the CPU to relinquish the data bus.

US Patent:

54855853, Jan 16, 1996

Filed:

Sep 18, 1992

Appl. No.:

7/947856

Inventors:

Duy Q. Huynh - Boca Raton FL
Kim V. Lam - Lake Worth FL
Loc T. Tran - Boca Raton FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1300

US Classification:

395311

Abstract:

This invention relates to personal computers having the capability for the usual system controlling processor to be reset, initialized and then isolated if an alternate system controller is provided for the system. In accordance with this invention, a personal computer system has a high speed local processor data bus; an input/output data bus; a microprocessor coupled directly to the local processor bus; a connector coupled directly to the local processor bus for accommodating reception of an alternate system controller; and a bus interface controller coupled directly to the local processor bus and directly to the input/output data bus for providing communications between the local processor bus and the input/output data bus. Provision is made for setting a status bit to identify to software such as diagnostic software which microprocessor is functioning as the system controlling processor.

US Patent:

56757514, Oct 7, 1997

Filed:

Nov 16, 1995

Appl. No.:

8/558379

Inventors:

Robert Grover Baker - Delray Beach FL
Duy Quoc Huynh - Boca Raton FL
Dennis Lee Moeller - Boca Raton FL
Paul Richard Swingle - Delray Beach FL
Loc Tien Tran - Boca Raton FL
Suksoon Yong - Boca Raton FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1314

US Classification:

395309

Abstract:

A computer system having a peripheral bus and a digital signal processor (DSP) local bus interfacing to the peripheral bus via an extended bus interface circuit (EBIC). The DSP local bus is configured such that devices, which are typically two or more DSPs, electrically connected to the DSP local bus may transfer data to other devices connected to the DSP local bus regardless of data transfer activity of the peripheral bus. Moreover, as seen from the peripheral bus, the devices connected to the DSP local bus have the same arbitration level. However, as seen from the DSP local bus, each device connected to the DSP local bus has a unique arbitration level determined by the priority of the tasks executing on the respective devices, as determined by a DSP operating system.