Louis F Poitras

US Patent:

7821297, Oct 26, 2010

Filed:

Oct 31, 2007

Appl. No.:

11/931191

Inventors:

Tacettin Isik - Saratoga CA, US
Louis F. Poitras - San Ramon CA, US
Daniel M. Clementi - Doylestown PA, US

Assignee:

Integrated Device Technology, Inc. - San Jose CA

International Classification:

H03K 19/094

US Classification:

326 86, 326115, 327109

Abstract:

A low power output driver includes one of a regulated reduced voltage source that receives a supply voltage and outputs a regulated reduced voltage that is a lower voltage than the supply voltage. The driver also includes a first driver input that receives a first logic signal, a second driver input that receives a second logic signal, a first driver output that outputs a first output signal and a second driver output that outputs a second output signal. The driver includes first, second, third and fourth n-type metal oxide semiconductor (NMOS) that are cross-connected between the reduced voltage and the first and second driver outputs or a constant voltage internal ground. When the second input is high, the second NMOS and the third NMOS are gated on, the second driver output is raised to the reduced voltage and the first driver output is pulled down to the constant voltage ground.

US Patent:

7830177, Nov 9, 2010

Filed:

Dec 23, 2008

Appl. No.:

12/342160

Inventors:

Tacettin Isik - Saratoga CA, US
Louis F. Poitras - San Ramon CA, US
Daniel M. Clementi - Doylestown PA, US

Assignee:

Integrated Device Technology, Inc. - San Jose CA

International Classification:

H03K 19/094

US Classification:

326 86, 326 83, 327109

Abstract:

A low power output driver includes one of a regulated reduced voltage source that receives a supply voltage and outputs a regulated reduced voltage that is a lower voltage than the supply voltage. The driver also includes a first driver input that receives a first logic signal, a second driver input that receives a second logic signal, a first driver output that outputs a first output signal and a second driver output that outputs a second output signal. The driver includes first, second, third and fourth n-type metal oxide semiconductor (NMOS) that are cross-connected between the reduced voltage and the first and second driver outputs or a constant voltage internal ground. When the second input is high, the second NMOS and the third NMOS are gated on, the second driver output is raised to the reduced voltage and the first driver output is pulled down to the constant voltage ground.

US Patent:

20060066354, Mar 30, 2006

Filed:

Sep 26, 2005

Appl. No.:

11/234911

Inventors:

Tacettin Isik - Saratoga CA, US
Louis Poitras - San Ramon CA, US
Daniel Clementi - Doylestown PA, US

International Classification:

H03K 19/0175

US Classification:

326086000

Abstract:

A low power output driver includes one of a regulated reduced voltage source that receives a supply voltage and outputs a regulated reduced voltage that is a lower voltage than the supply voltage. The driver also includes a first driver input that receives a first logic signal, a second driver input that receives a second logic signal, a first driver output that outputs a first output signal and a second driver output that outputs a second output signal. The driver includes first, second, third and fourth n-type metal oxide semiconductor (NMOS) that are cross-connected between the reduced voltage and the first and second driver outputs or ground. When the second input is high, the second NMOS and the third NMOS are gated on, the second driver output is raised to the reduced voltage and the first driver output is pulled down to the internal ground.