Mansi P Chhichhia

age ~36

from Santa Clara, CA

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Also known as:
  • Mansi Pankajbhai Chhichhia
Related to:
Connected to:

Mansi Chhichhia Phones & Addresses

  • Santa Clara, CA
  • San Jose, CA
  • Sunnyvale, CA

Work

  • Company:
    Ssr labs
    Apr 2013
  • Position:
    Asic design intern

Education

  • School / High School:
    San Jose State University- San Jose, CA
    Aug 2011
  • Specialities:
    Master of Science in Electrical Engineering

Skills

Digital Design • Verification • Verilog • System Verilog • C/C++ • Perl • Logic Design

Industries

Semiconductors

Resumes

Mansi Chhichhia Photo 1

Lead Application Engineer

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Mentor Graphics Jul 2014 - Jun 2015
Associate Engineer - Emulation
Scalable Systems Research Labs Inc. Apr 2013 - Apr 2014
Asic Design Intern
Apr 2013 - Apr 2014
Lead Application Engineer
Education:
San Jose State University 2011 - 2013
Masters, Electrical Engineering C.u.shah College of Engg and Technology 2006 - 2010
Bachelor of Engineering, Bachelors, Communications, Electronics
Skills:
Emulation
Veloce
Verilog
Asic
System Verilog
Uvm
Matlab
C++
Unix
Linux
Perl
Mansi Chhichhia Photo 2

Mansi Chhichhia San Jose, CA

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Work:
SSR Labs

Apr 2013 to 2000
ASIC Design Intern Tata Teleservices
Ahmedabad, Gujarat
Dec 2009 to Apr 2010
RF Engineering Intern
Education:
San Jose State University
San Jose, CA
Aug 2011 to 2000
Master of Science in Electrical Engineering C.U.Shah College Of Engineering & Technology
Sep 2006 to Jul 2010
Bachelor of Engineering in Electronics & Telecommunication
Skills:
Digital Design, Verification, Verilog, System Verilog, C/C++, Perl, Logic Design

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Mansi Chhichhia Photo 3

Mansi Chhichhia

Mansi Chhichhia Photo 4

Mansi Chhichhia

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