Mark J Allison

US Patent:

46396640, Jan 27, 1987

Filed:

May 31, 1984

Appl. No.:

6/615979

Inventors:

Anthony M. Chiu - Richardson TX
Mark D. Allison - Boise ID
James W. Jones - Singapore, SG
Lyndale A. Trammell - Baguio City, PH
Fock San Ho - Singapore, SG

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G01R 3128
B07C 500

US Classification:

324 73AT

Abstract:

In accordance with a broad aspect of the invention, a system is presented for parametrically and functionally testing integrated circuit devices in parallel. At least one integrated circuit device receiving channel is provided for defining a plurality of integrated circuit device test stations therealong, and means are provided for delivering parametric and functional test signals at least functionally in parallel to each of the integrated circuit device test stations. Means are provided at each test station for selectively engaging the integrated circuit devices to apply the parametric and functional test signals to the integrated circuit device at that station, and to selectively isolate the device from the test signals. Means are provided for receiving an output from each test location in response to the test signals, and means for determining from the output the parameters of each tested integrated circuit device. In accordance with the invention, means are provided for sorting the tested integrated circuit devices according to their measured or tested parameters.