Mark A Eriksson

US Patent:

6597010, Jul 22, 2003

Filed:

Mar 8, 2002

Appl. No.:

10/093960

Inventors:

Mark A. Eriksson - Madison WI
Mark G. Friesen - Middleton WI
Robert J. Joynt - Madison WI
Max G. Lagally - Madison WI
Daniel W. van der Weide - Madison WI
Paul Rugheimer - Madison WI
Donald E. Savage - Madison WI

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L 2906

US Classification:

257 14, 257 9, 257 12, 257 17, 257 20

Abstract:

Semiconductor dot devices include a multiple layer semiconductor structure having a substrate, a back gate electrode layer, a quantum well layer, a tunnel barrier layer between the quantum well layer and the back gate, and a barrier layer above the quantum well layer. Multiple electrode gates are formed on the multi-layer semiconductor with the gates spaced from each other by a region beneath which quantum dots may be defined. Appropriate voltages applied to the electrodes allow the development and appropriate positioning of the quantum dots, allowing a large number of quantum dots be formed in a series with appropriate coupling between the dots.

US Patent:

7135697, Nov 14, 2006

Filed:

Feb 25, 2004

Appl. No.:

10/787075

Inventors:

Mark Gregory Friesen - Middleton WI, US
Charles George Tahan - Madison WI, US
Robert James Joynt - Madison WI, US
Mark A. Eriksson - Madison WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L 29/06

US Classification:

257 14, 257 24

Abstract:

A semiconductor quantum dot device converts spin information to charge information utilizing an elongated quantum dot having an asymmetric confining potential along its length so that charge movement occurs during orbital excitation. A single electron sensitive electrometer is utilized to detect the charge movement. Initialization and readout can be carried out rapidly utilizing RF fields at appropriate frequencies.

US Patent:

7354809, Apr 8, 2008

Filed:

Feb 13, 2006

Appl. No.:

11/276065

Inventors:

Hao-Chih Yuan - Madison WI, US
Guogong Wang - Madison WI, US
Mark A. Eriksson - Madison WI, US
Paul G. Evans - Madison WI, US
Max G. Lagally - Madison WI, US
Zhenqiang Ma - Middleton WI, US

Assignee:

Wisconsin Alumi Research Foundation - Madison WI

International Classification:

H01L 21/46

US Classification:

438157, 438458, 257E21614

Abstract:

This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

US Patent:

7645933, Jan 12, 2010

Filed:

Mar 2, 2005

Appl. No.:

11/070834

Inventors:

Todd R. Narkis - Indianapolis IN, US
Matt S. Marcus - Madison WI, US
Max G. Lagally - Madison WI, US
Mark A. Eriksson - Madison WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L 31/00
H02N 6/00
H01J 9/02
H01J 1/00

US Classification:

136252, 136243, 313310, 313311

Abstract:

Carbon nanotube Schottky barrier photovoltaic cells and methods and apparatus for making the cells are provided. The photovoltaic cells include at least one contact made from a first contact material, at least one contact made from a second contact material and a plurality of photoconducting carbon nanotubes bridging the contacts. A Schottky barrier is formed at the interface between the first contact material and the carbon nanotubes while at the interface between the second contact material and the carbon nanotubes, a Schottky barrier for the opposite carrier is formed, or a small, or no Schottky barrier is formed. It is the Schottky barrier asymmetry that allows the photo-excited electron-hole pairs to escape from the carbon nanotube device.

US Patent:

7776642, Aug 17, 2010

Filed:

May 15, 2008

Appl. No.:

12/120933

Inventors:

Mark A. Eriksson - Madison WI, US
Max G. Lagally - Madison WI, US
Arnold Melvin Kiefer - Madison WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L 21/00

US Classification:

438 74, 438109, 438734, 438962, 257 23, 257 25, 257E29069

Abstract:

A quantum-well photoelectric device, such as a quantum cascade laser, is constructed of monocrystalline nanoscale membranes physically removed from a substrate and mechanically assembled into a stack.

US Patent:

7812353, Oct 12, 2010

Filed:

Mar 4, 2008

Appl. No.:

12/042066

Inventors:

Hao-Chih Yuan - Madison WI, US
Guogong Wang - Madison WI, US
Mark A. Eriksson - Madison WI, US
Paul G. Evans - Madison WI, US
Max G. Lagally - Madison WI, US
Zhenqiang Ma - Middleton WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L 29/73
H01L 29/772
H01L 29/78

US Classification:

257 74, 257351, 257565, 257E27027

Abstract:

This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

US Patent:

8089073, Jan 3, 2012

Filed:

Sep 8, 2010

Appl. No.:

12/877269

Inventors:

Paul G. Evans - Madison WI, US
Max G. Lagally - Madison WI, US
Zhenqiang Ma - Middleton WI, US
Hao-Chih Yuan - Lakewood CO, US
Guogong Wang - Madison WI, US
Mark A. Eriksson - Madison WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L 27/04

US Classification:

257 74, 257E27027

Abstract:

This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

US Patent:

20170206461, Jul 20, 2017

Filed:

Jan 15, 2016

Appl. No.:

14/996918

Inventors:

- Madison WI, US
Mark Eriksson - Madison WI, US
Susan Coppersmith - Madison WI, US

International Classification:

G06N 99/00
G06F 15/82

Abstract:

A quantum computing system and method for performing quantum computation is provided. In some aspects, the system includes at least one charge qubit comprising a quantum dot assembly prepared with a symmetric charge distribution, wherein the symmetric charge distribution is configured to reduce a coupling between the charge qubit and a charge noise source. The system also includes a controller for controlling the at least one charge qubit to perform a quantum computation. The system further includes an output for providing a report generated using information obtained from the quantum computation performed.