Mark David Levy

US Patent:

7037824, May 2, 2006

Filed:

May 13, 2004

Appl. No.:

10/844533

Inventors:

Lloyd G. Burrell - Poughkeepsie NY, US
Jeffrey P. Gambino - Westford VT, US
Hyun Koo Lee - LaGrangeville NY, US
Mark D. Levy - Essex Junction VT, US
Baozhen Li - South Burlington VT, US
Stephen E. Luce - Underhill VT, US
Thomas L. McDevitt - Underhill VT, US
Anthony K. Stamper - Williston VT, US
Kwong Hon Wong - Wappingers Falls NY, US
Sally J. Yankee - Underhill VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/4763

US Classification:

438627, 438629, 438643, 438648, 438653, 438687

Abstract:

Tungsten studs of a size comparable to vias are provided to integrate and interface between copper and aluminum metallization layers in an integrated circuit and/or package therefor by lining a via opening, preferably with layers of tantalum nitride and PVD tungsten as a barrier against the corrosive effects of tungsten fluoride on copper. The reduced size of the tungsten studs relative to known interface structures allows wiring and connection pads to be formed in a single aluminum layer, improving performance and reducing process time and cost.

US Patent:

7060626, Jun 13, 2006

Filed:

Jun 25, 2003

Appl. No.:

10/604087

Inventors:

Kenneth A. Bandy - Red Hook NY, US
Vincent J. Carlos - Essex Town VT, US
Mark D. Levy - Essex Junction VT, US
Sara L. Lucas - Burlington VT, US
Timothy C. Milmore - South Burlington VT, US
Matthew C. Nicholls - South Burlington VT, US
Jason Nowakowski - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/302

US Classification:

438714, 438706, 438710, 430312, 216 47

Abstract:

A method for forming a semiconductor wafer comprising of applying a first patterned resist to at least one first predetermined region of a wafer where said at least one first predetermined region of said wafer are protected by said first patterned resist and a first remaining portion of said wafer is not protected by said first patterned resist; etching said first remaining portion of said wafer not protected by said first pattern resist; stripping the first pattern resist from said wafer; applying a second patterned resist to at least one second pre-determined region of said wafer where said at least one second predetermined region of said wafer are protected by a second patterned resist and a second remaining portion is not protected by said second patterned resist; etching said second remaining portion not protected by said second patterned resist; and stripping said second patterned resist from said wafer.

US Patent:

7087997, Aug 8, 2006

Filed:

Mar 12, 2001

Appl. No.:

09/805027

Inventors:

Lloyd G. Burrell - Poughkeepsie NY, US
Jeffrey P. Gambino - Westford VT, US
Hyun Koo Lee - LaGrangeville NY, US
Mark D. Levy - Essex Junction VT, US
Baozhen Li - South Burlington VT, US
Stephen E. Luce - Underhill VT, US
Thomas L. McDevitt - Underhill VT, US
Anthony K. Stamper - Williston VT, US
Kwong Hon Wong - Wappingers Falls NY, US
Sally J. Yankee - Underhill VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23/48
H01L 23/52
H01L 29/40

US Classification:

257750, 257761, 257762, 257763, 257764, 257770

Abstract:

Tungsten studs of a size comparable to vias are provided to integrate and interface between copper and aluminum metallization layers in an integrated circuit and/or package therefor by lining a via opening, preferably with layers of tantalum nitride and PVD tungsten as a barrier against the corrosive effects of tungsten fluoride on copper. The reduced size of the tungsten studs relative to known interface structures allows wiring and connection pads to be formed in a single aluminum layer, improving performance and reducing process time and cost.

Address:

275 Gregory Rd, Franklin Lakes, NJ 07417

Phone:

2018488858

VIN:

WBAEK13527CN81570

Make:

BMW

Model:

6 SERIES

Year:

2007