Mark David Mathews

US Patent:

54205158, May 30, 1995

Filed:

Aug 28, 1992

Appl. No.:

7/937626

Inventors:

Thomas F. Uhling - Monument CO
Philip J. Yearsley - Colorado Springs CO
Dale L. Pittock - Colorado Springs CO
Mark E. Mathews - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 3500

US Classification:

324601

Abstract:

An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1. 4. mu. sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1. 4. mu. sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.

US Patent:

54462606, Aug 29, 1995

Filed:

Jan 18, 1994

Appl. No.:

8/182926

Inventors:

Thomas F. Uhling - Monument CO
Philip J. Yearsley - Colorado Springs CO
Dale L. Pittock - Colorado Springs CO
Mark E. Mathews - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

B23K 2602

US Classification:

21912169

Abstract:

An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1. 4. mu. sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1. 4. mu. sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.

US Patent:

55259103, Jun 11, 1996

Filed:

Mar 2, 1995

Appl. No.:

8/397347

Inventors:

Thomas F. Uhling - Monument CO
Philip J. Yearsley - Colorado Springs CO
Dale L. Pittock - Colorado Springs CO
Mark E. Mathews - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 3500

US Classification:

324601

Abstract:

An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1. 4. mu. sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1. 4. mu. sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.

US Patent:

56024835, Feb 11, 1997

Filed:

Feb 27, 1995

Appl. No.:

8/394855

Inventors:

Thomas F. Uhling - Monument CO
Philip J. Yearsley - Colorado Springs CO
Dale L. Pittock - Colorado Springs CO
Mark E. Mathews - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 3500

US Classification:

324601

Abstract:

An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1. 4. mu. sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1. 4. mu. sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.

US Patent:

54282047, Jun 27, 1995

Filed:

Jan 18, 1994

Appl. No.:

8/182925

Inventors:

Thomas F. Uhling - Monument CO
Philip J. Yearsley - Colorado Springs CO
Dale L. Pittock - Colorado Springs CO
Mark E. Mathews - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

B23K 2600

US Classification:

21912168

Abstract:

An electronic probe circuit having ac and dc amplifiers and an input compensation subcircuit is enclosed within a trim housing that replicates the electrical effect of the probe housing. The circuit is laser trimmed through ports in the trim housing. The difference between the voltage at 80 nsec and 1. 4. mu. sec points on a step voltage provides a first calibration factor while the difference between the 3 nsec voltage and the 80 nsec voltage provides a second calibration factor. A resistor in the DC amplifier is trimmed to an absolute voltage with a step scan laser cut. A resistor in the AC amplifier is trimmed with a laser L-cut until the difference between the 80 nsec and 1. 4. mu. sec points of the step voltage equals the first calibration factor. A capacitor in the input compensation subcircuit is trimmed until the voltage difference between the 3 nsec and 80 nsec points equals the second calibration factor.