Mark S Mcclain

US Patent:

6731536, May 4, 2004

Filed:

Mar 7, 2002

Appl. No.:

10/091767

Inventors:

Mark Alan McClain - San Diego CA
Michael Garrett Tanaka - San Jose CA
Ralf Muenster - Los Altos CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G11C 700

US Classification:

36518504, 36518529, 36518901, 365218

Abstract:

In protecting Flash memory data, a flexible system and method provides for different levels of protection. It offers the ability to dynamically lock a sector of memory using a dynamic protection bit in volatile memory. It offers persistent locking of a sector using a non-volatile bit in memory and locking this status using a lock bit in volatile memory. It offers yet further protection by including a password mode which requires a password to clear the lock bit. The password is located in an unreadable, one time programmable area of the memory. The memory also includes areas, whose protection state is controlled by an input signal, for storing boot code in a protected manner.

US Patent:

7058779, Jun 6, 2006

Filed:

Mar 5, 2002

Appl. No.:

10/091766

Inventors:

Mark Alan McClain - San Diego CA, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 12/00

US Classification:

711170, 711100, 711104, 711105, 711111, 711112, 711169, 713 1, 713 2, 710 10

Abstract:

A method for reducing the number of interface lines and non-volatile memory devices in a computer system includes providing a non-volatile memory having a SDRAM style interface. A system having both non-volatile memory and SDRAM has reduced interface lines by providing only one memory interface. A system where the SDRAM interface logic is initialized by code stored in the non-volatile memory having a SDRAM style interface, eliminating any requirement for other non-volatile memory, independent of the SDRAM interface, from which to initialize the system.

US Patent:

20160307611, Oct 20, 2016

Filed:

Feb 24, 2016

Appl. No.:

15/052709

Inventors:

- San Jose CA, US
Mark Alan McClain - San Diego CA, US

International Classification:

G11C 8/00

Abstract:

Embodiments of the present invention include an apparatus, method, and system for integrating data processing logic with memory. An embodiment of a memory integrated circuit is designed to execute a task on the data in a memory array within a memory integrated circuit. The memory integrated circuit can include a memory array, a data access component, a data holding component, and a logic component. The data access component can be coupled to the memory array and configured to provide an address to the memory array. The data holding component can be coupled to the memory array and configured to temporarily store the data in the memory array located at the address. The logic component can be coupled to both the data access component and the data holding component, and be configured to execute a task using data received from the data holding component. The logic component can include combinational or sequential logic.

US Patent:

20140177375, Jun 26, 2014

Filed:

Dec 21, 2012

Appl. No.:

13/725415

Inventors:

- Sunnyvale CA, US
Mark A. McClain - San Diego CA, US

Assignee:

Spansion LLC - Sunnyvale CA

International Classification:

G11C 8/00

US Classification:

36523001

Abstract:

Embodiments of the present invention include an apparatus, method, and system for integrating data processing logic with memory. An embodiment of a memory integrated circuit is designed to execute a task on the data in a memory array within a memory integrated circuit. The memory integrated circuit can include a memory array, a data access component, a data holding component, and a logic component. The data access component can be coupled to the memory array and configured to provide an address to the memory array. The data holding component can be coupled to the memory array and configured to temporarily store the data in the memory array located at the address. The logic component can be coupled to both the data access component and the data holding component, and be configured to execute a task using data received from the data holding component. The logic component can include combinational or sequential logic.