Mark G Robson

US Patent:

7919379, Apr 5, 2011

Filed:

Sep 10, 2007

Appl. No.:

11/852906

Inventors:

Eduard A. Cartier - New York NY, US
Rashmi Jha - Wappingers Falls NY, US
Sivananda Kanakasabapathy - Niskayuna NY, US
Xi Li - Somers NY, US
Renee T. Mo - Briarcliff Manor NY, US
Vijay Narayanan - New York NY, US
Vamsi Paruchuri - Albany NY, US
Mark T. Robson - Danbury CT, US
Kathryn T. Schonenberg - Wappingers Falls NY, US
Michelle L. Steen - Danbury CT, US
Richard Wise - Newburgh NY, US
Ying Zhang - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/00
H01L 21/336

US Classification:

438302, 438304, 438305, 438306, 438592, 257316, 257320, 257387, 257E21202, 257E21205, 257E21444

Abstract:

The present invention relates to semiconductor devices, and more particularly to a process and structure for removing a dielectric spacer selective to a surface of a semiconductor substrate with substantially no removal of the semiconductor substrate. The method of the present invention can be integrated into a conventional CMOS processing scheme or into a conventional BiCMOS processing scheme. The method includes forming a field effect transistor on a semiconductor substrate, the FET comprising a dielectric spacer and the gate structure, the dielectric spacer located adjacent a sidewall of the gate structure and over a source/drain region in the semiconductor substrate; depositing a first nitride layer over the FET; and removing the nitride layer and the dielectric spacer selective to the semiconductor substrate with substantially no removal of the semiconductor substrate.