Mark T Winter

US Patent:

20160093399, Mar 31, 2016

Filed:

Nov 6, 2014

Appl. No.:

14/534548

Inventors:

- Irvine CA, US
Yifei ZHANG - Edina MN, US
Carl MONZEL - Eagan MN, US
Mark Jon WINTER - Seattle WA, US

International Classification:

G11C 29/04
G11C 7/12

Abstract:

A device for monitoring process variations across memory bitcells includes a bitcell inverter that provides an output voltage to be used for identifying skewed corners of the memory bitcells. A first comparator compares the output voltage with a first reference voltage, and a second comparator compares the output voltage with a second reference voltage. The first and the second comparators generate a corner code based on comparison results.

US Patent:

20150146476, May 28, 2015

Filed:

Dec 20, 2013

Appl. No.:

14/137291

Inventors:

- Irvine CA, US
Myron Buer - Savage MN, US
Mark Winter - Seattle WA, US

Assignee:

BROADCOM CORPORATION - Irvine CA

International Classification:

G11C 11/412
G11C 5/14
G11C 11/419

US Classification:

365154, 36518916

Abstract:

Passive write assist passively improves SRAM performance (e.g., write margin speed) while reducing manufacturing costs (e.g., die area, packaging) and operating costs (e.g., power consumption, cooling) associated with active write assist schemes. Passive write assist may be implemented in peripheral circuitry or embedded in an SRAM array or even in each array cell or bitcell. For example, one or more memory cells may be converted to provide passive write assist to a plurality of other memory cells. As another example, each memory cell may independently implement passive write assist using one or more high resistive contacts to couple to the array power supply, resulting in the array voltage level being changed by different amounts in different memory cells according to cell variations.