Mary L Gallagher

US Patent:

6895596, May 17, 2005

Filed:

Dec 23, 1997

Appl. No.:

08/997622

Inventors:

William E. Salzer - Gilbert AZ, US
Mary E. Gallagher - Phoenix AZ, US
Patrick J. O'Malley - Chandler AZ, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H04N007/16

US Classification:

725142, 725139, 725151, 386 97, 386 99, 370537, 348481, 348485

Abstract:

A circuit and method of interleaving a data stream (DATA) in which the data to be interleaved is contained in separate sections of the data stream. A buffer storage circuit () receives and stores the data stream. A first section (T-T) of the data stream is transferred to a first memory circuit () and a second section (T-T) of the data stream is transferred to a second memory circuit (). A multiplexer circuit () receives data from the first and second memory circuits and selects between the first and second sections of the data stream in response to a selection signal to produce an interleaved output signal.

US Patent:

53962966, Mar 7, 1995

Filed:

Nov 8, 1993

Appl. No.:

8/148455

Inventors:

Mary E. Gallagher - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04N 545

US Classification:

348565

Abstract:

A circuit (10) for inserting a secondary video signal in a primary video signal. The primary and secondary video signals are combined forming a combined video signal having a primary video portion and a secondary video portion. The combined video signal is fed back to a feedback matching circuit (21) for measuring and comparing the phase, amplitude, and blanking level of a reference signal of the primary video portion and a reference signal of the secondary video portion of the combined video signal. The feedback matching circuit (21) makes an adjustment to the secondary video signal to reduce differences between the reference signals of the primary and secondary video portions of the combined video signal.