Max J. Allen - Cupertino CA Richard E. Colbeth - Los Altos CA Martin Mallinson - British Columbia, CA
Assignee:
Varian Associates, Inc. - Palo Alto CA
International Classification:
H03K 1756 H03F 368
US Classification:
327407
Abstract:
A current mode analog signal multiplexor includes multiple input multiplexed differential amplifiers, and an output differential current amplifier. An input multiplex control signal selects and enables one of the input multiplexed differential amplifiers for buffering and steering the input signal current to one side of the output differential current amplifier. The reference amplifier drives the other side of the output differential current amplifier. The output node of the output differential current amplifier remains at a substantially constant voltage potential while providing an output current which varies in relation to the selected input signal.
Charge Sensitive Amplifier With High Common Mode Signal Rejection
Richard E. Colbeth - Los Altos CA Max J. Allen - Cupertino CA Martin Mallinson - British Columbia, CA
Assignee:
Varian Medical Systems, Inc. - Palo Alto CA
International Classification:
H03K 1760
US Classification:
327432
Abstract:
A charge sensitive amplifier with high common mode signal rejection includes an NPN bipolar junction transistor (BJT) and a P-channel metal oxide semiconductor field effect transistor (MOSFET) connected in a totem pole circuit configuration. The BJT base terminal receives a dc reference voltage, the MOSFET gate terminal receives the incoming data signal, the MOSFET drain terminal is grounded and the BJT collector terminal provides the output voltage signal and is biased by the power supply through a resistive circuit element. The MOSFET operates as a source follower amplifier with the transconductance of the BJT serving as the load at the source terminal, while the BJT operates as a common emitter amplifier with the transconductance of the MOSFET providing emitter degeneration. The signal gains of such source follower and common emitter amplifiers are substantially equal and of opposite polarities. Therefore, any common mode signal components due to common mode input signals present at the input terminals (i. e.
Pipelined Sample And Hold Circuit With Correlated Double Sampling
Martin Mallinson - British Columbia, CA Max J. Allen - Cupertino CA Richard E. Colbeth - Los Altos CA
Assignee:
Varian Associates, Inc. - Palo Alto CA
International Classification:
G11C 2702
US Classification:
327 94
Abstract:
A signal sampling circuit for performing correlated double sampling (CDS) of an input signal with a pipelined sample and hold architecture includes a time multiplexed integrating amplifier circuit in which the output circuit is a pipelined sample and hold circuit which provides time multiplexed input signal samples and the feedback integration capacitor is discharged between samples. At all times, one of the channels of the pipelined sample and hold circuit is providing one of the time multiplexed input signal samples while the other channel continues tracking the input signal. The feedback integration capacitor acts as a clamp to null out residual reset noise received as part of the input signal to be sampled. Hence, with the exception of that very brief period of time necessary for switching between the two pipelined sample and hold circuit channels, one of the two pipelined sample and hold circuit channels is always available for signal acquisition.
Chief of Staff at University of North Carolina Wil... Past: Executive Assistant to the President and Director, University Relations at Georgia College...
Blah blah blah im married with currently just the 1 son.
Max Allen
Work:
Platinum Squared Ltd - Principal Consultant (2008)
Education:
Kingsbridge Secondary School
Tagline:
Bigger Better Faster More
Max Allen
About:
Originally from ME, lived for 20 years in OK and now residing in Peoria, AZ -Retired from a lifelong career in Pharmacy much of which was as a consultant pharmacist to long term care facilities. Finis...