Max E Nielsen

from Pocatello, ID

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Max Nielsen Phones & Addresses

Pocatello, ID

Work

Company:

Toshiba medical research institute / usa
Feb 2012
Position:

Analog ic design engineer

Education

School / High School:

Brigham Young University
Specialities:

BSEE

Skills

IC Design Detailed transistor-level elec... • electro-mechanical • and electro- optic integrated circuits. ... • RF/IF • servo systems • electro-optical. Tools: Spectre • Spectre RF • Virtuoso Layout • HSPICE • PSPICE • Eldo • Pstar • Tanner. System Engineering and Architec... • distortion • time and frequency domain performance • receiver modeling. MEMS: Pressure and ac... • goniometry • and noise analysis. Remote thermal sensi... • Mathcad • programming (FORTRAN • C • Basic • Turbo Pascal).

Resumes

Max Nielsen

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Max Nielsen Orting, WA

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Work:

Toshiba Medical Research Institute / USA

Feb 2012 to 2000
Analog IC Design Engineer Texas Instruments, Inc
Dallas, TX
Jun 2010 to Jan 2012
High Voltage Designer Epoch Microelectronics
Tarrytown, NY
Sep 2009 to Jun 2010
RF IC Design Engineer SonoSite
Bothell, WA
Mar 2007 to Sep 2009
Principal Engineer - Analog ICs On Semiconductor
Pocatello, ID
2003 to 2007
Sr. Staff Engineer Bear River Microsystems
Grace, ID
Jul 1992 to Apr 2005
Independent Consultant Integrated Micromachines, Inc
Monrovia, CA
2000 to 2002
Analog IC Design Engineer / MEMS System Engineer

Education:

Brigham Young University
BSEE University of Utah
physics and electrical engineering

Skills:

IC Design Detailed transistor-level electronic design of analog, electro-mechanical, and electro- optic integrated circuits. IC floor planning and layout. Foundry selection and coordination. Testing and verification. Product Areas: Medical ultrasound, RF/IF, servo systems, electro-optical. Tools: Spectre, Spectre RF, Virtuoso Layout, HSPICE, PSPICE, Eldo, Pstar, Tanner. System Engineering and Architecture Development Communication systems: Analysis and design of architectures for noise, distortion, time and frequency domain performance, receiver modeling. MEMS: Pressure and acoustic sensors and signal conditioning electronics. Electro- mechanical servo systems. Control System Analysis and Design: Optical beam steering and jitter suppression. Error budgets. Modeling and optimization of mechanical servo systems involving resonant structures. Electro-optical systems: Optical path length stabilization. Wavefront sensing and control. Radiometry, goniometry, and noise analysis. Remote thermal sensing. Tools: Excel, Mathcad, programming (FORTRAN, C, Basic, Turbo Pascal).

Us Patents

Trap Circuits For Use With Capacitively-Coupled Resonant Clock Networks
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US Patent:

20220286129, Sep 8, 2022
Filed:

Feb 11, 2022
Appl. No.:

17/669502
Inventors:

- Redmond WA, US
Max Earl NIELSEN - Pocatello ID, US
International Classification:

H03K 17/92
G06F 1/10
Abstract:

Trap circuits for use with superconducting integrated circuits having capacitively-coupled resonant clock networks are described. An example superconducting integrated circuit (IC) includes a clock structure coupled: (1) to a first Josephson junction (JJ) via a first capacitor, where the first capacitor is configured to receive a clock signal via the clock structure and couple a first bias current to the first JJ, and (2) to a second JJ via a second capacitor, where the second capacitor is configured to receive a clock signal via the clock structure and couple a second bias current to the second JJ. The superconducting IC further includes a trap circuit coupled between the first capacitor and the first JJ, where the trap circuit is configured to attenuate any signals generated by a triggering of the first JJ to reduce crosstalk between the first JJ and the second JJ.

Trap Circuits For Use With Differential Capacitively-Coupled Resonant Clock Networks
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US Patent:

20220286136, Sep 8, 2022
Filed:

Mar 8, 2021
Appl. No.:

17/194547
Inventors:

- Redmond WA, US
Max Earl NIELSEN - Pocatello ID, US
International Classification:

H03K 19/195
H01L 39/02
H03K 19/0185
H03K 19/00
Abstract:

Trap circuits for use with superconducting integrated circuits having differential capacitively-coupled resonant clock networks are described. An example superconducting integrated circuit (IC) includes a first superconducting circuit comprising: (1) a first Josephson junction (JJ) coupled via a first capacitor to a first clock line, where the first capacitor is configured to receive a first clock signal having a first phase via the first clock line and couple a first bias current to the first JJ, and (2) a second JJ coupled via a second capacitor to a second clock line, where the second capacitor is configured to receive a second clock signal having a second phase via the second clock line and couple a second bias current to the second JJ. The superconducting IC further includes a first trap circuit for the first superconducting circuit and a second trap circuit for a second superconducting circuit having additional JJs.

Classmates

Max Nielsen

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Schools:

Mountain High School Kaysville UT 1986-1990

Community:

Teresa Connelly

Mountain High School, Kay...

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Graduates:

Jessica Brown (1971-1975),
Teresa Connelly (1990-1991),
Jared Nielsen (1986-1990),
Max Nielsen (1986-1990)

Lake Benton High School, ...

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Graduates:

Deb Busselman (1971-1975),
Ernst Max Nielsen (1967-1971),
Veronica Johansen (1986-1990),
Rod Dagel (1969-1973)

Googleplus

Max Nielsen

Work:

Spar Nord Bank - IT-systemtekniker (1997)
Silkeborg Handelsskole - Systemadministrator (1992-1997)

Education:

Håndværkerskolen i Sønderborg - Datamekaniker

Max Nielsen

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