Michael G Ang

US Patent:

6339351, Jan 15, 2002

Filed:

Jun 7, 1999

Appl. No.:

09/326964

Inventors:

Michael A. Ang - Santa Clara CA
Alexander D. Taylor - Cupertino CA
Jonathan E. Starr - Cupertino CA
Sai V. Vishwanthaiah - Sunnyvale CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

H03K 512

US Classification:

327170, 327108, 326 82, 326 87

Abstract:

A driver may be provided which controls output impedance of a driver which includes within the driver an impedance circuit and slew rate control. Accordingly, a desired output slew rate and a desired output impedance can be advantageously established and maintained over a wide range of variations in operating conditions, manufacturing processes and output voltage levels. Such a driver also advantageously limits any crowbar current, thereby reducing the overall power consumption of the driver with little, if any, degradation of driver performance.

US Patent:

6339542, Jan 15, 2002

Filed:

Jun 6, 2001

Appl. No.:

09/876303

Inventors:

Michael Anthony Ang - San Francisco CA
Raymond A. Heald - Los Altos CA
Roger Y. Lo - San Jose CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G11C 1100

US Classification:

365154, 365149

Abstract:

A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages are supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.

US Patent:

6366139, Apr 2, 2002

Filed:

Jun 7, 1999

Appl. No.:

09/327220

Inventors:

Michael A. Ang - Santa Clara CA
Alexander D. Taylor - Cupertino CA
Jonathan E. Starr - Cupertino CA
Sai V. Vishwanthaiah - Sunnyvale CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

H03B 100

US Classification:

327108, 327327, 327112, 326 87, 326 82

Abstract:

A method may be provided which controls the output impedance of a driver which includes within the driver an impedance circuit and a slew rate control. Accordingly, a desired output slew rate and a desired output impedance can be advantageously established and maintained over a wide range of variations in operating conditions, manufacturing processes and output voltage levels. Such a method also advantageously limits any crowbar current, thereby reducing the overall power consumption of the driver with little, if any, degradation of driver performance.

US Patent:

6384675, May 7, 2002

Filed:

Mar 22, 2000

Appl. No.:

09/532925

Inventors:

Michael Anthony Ang - Santa Clara CA
Alexander Dougald Taylor - Cupertino CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G06G 712

US Classification:

327562, 327112, 327333, 330264, 330269, 330277

Abstract:

An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e. g. , during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e. g. , during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines.

US Patent:

6411131, Jun 25, 2002

Filed:

May 21, 1999

Appl. No.:

09/316421

Inventors:

Michael A. Ang - San Francisco CA
Jonathan E. Starr - Cupertino CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G01R 1900

US Classification:

327 52, 327 56

Abstract:

A receiver is provided which quickly and efficiently recognizes signals by including with the receiver a resolving circuit which is coupled to a signal generation circuit which provides a differential current. The resolving circuit is coupled to a latching circuit. The resolving circuit can operate with supply voltage levels as low as one threshold voltage. Also, the signal setup and hold times are inherently vary small due to the high intrinsic bandwidth of the receiver. Other advantages include reduced power consumption, high speed operation, good rejection of input noise and power supply noise, ability to resolve small (e. g. , 1. 0 mVolt) voltage differences, reduced capacitive loading, and the ability to function with a variety of types of drivers, including HSTL, DTL and PECL.

US Patent:

6420913, Jul 16, 2002

Filed:

Sep 20, 1999

Appl. No.:

09/398868

Inventors:

Michael A. Ang - San Francisco CA
Alexander D. Taylor - Olga WA
Jonathan E. Starr - Cupertino CA
Sai V. Vishwanthaiah - Sunnyvale CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

H03B 100

US Classification:

327108, 327112

Abstract:

A driver capable of launching signals into a transmission line and of terminating signals at a receiver end of the transmission line includes within the driver a circuit for controlling the output impedance and a circuit for controlling the output slew rate. Accordingly, a desired output impedance can be advantageously established and maintained over a wide range of variations in operating conditions, manufacturing processes and output voltage levels. Such a driver also advantageously limits any crowbar current, thereby reducing the overall power consumption of the driver with little, if any, degradation of driver performance. The driver includes a pull up circuit coupled to receive at least one of a plurality of control codes. The pull up circuit includes pull up output circuit and an impedance control buffer circuit, a parallel pull up circuit, the parallel pull up circuit and the pull up output circuit being controllable to adjust the impedance of the pull up circuit. The driver also includes a pull down circuit coupled to receive at least one of the plurality of control codes.

US Patent:

6509785, Jan 21, 2003

Filed:

Mar 22, 2000

Appl. No.:

09/532381

Inventors:

Michael Anthony Ang - Santa Clara CA
Alexander Dougald Taylor - Cupertino CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G05F 110

US Classification:

327538, 327310, 327554, 323209, 323364

Abstract:

An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e. g. , during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e. g. , during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines.

US Patent:

6608506, Aug 19, 2003

Filed:

Mar 20, 2002

Appl. No.:

10/102564

Inventors:

Michael A. Ang - San Francisco CA
Alexander D. Taylor - Olga WA
Jonathan E. Starr - Cupertino CA
Sai V. Vishwanthaiah - Sunnyvale CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

H03B 100

US Classification:

327108, 327112

Abstract:

A driver capable of launching signals into a transmission line and of terminating signals at a receiver end of the transmission line includes within the driver a circuit for controlling the output impedance and a circuit for controlling the output slew rate. Accordingly, a desired output impedance can be advantageously established and maintained over a wide range of variations in operating conditions, manufacturing processes and output voltage levels. Such a driver also advantageously limits any crowbar current, thereby reducing the overall power consumption of the driver with little, if any, degradation of driver performance. The driver includes a pull up circuit coupled to receive at least one of a plurality of control codes. The pull up circuit includes pull up output circuit and an impedance control buffer circuit, a parallel pull up circuit, the parallel pull up circuit and the pull up output circuit being controllable to adjust the impedance of the pull up circuit. The driver also includes a pull down circuit coupled to receive at least one of the plurality of control codes.