Michael D Crews

US Patent:

59336099, Aug 3, 1999

Filed:

Apr 8, 1996

Appl. No.:

8/629015

Inventors:

Gary Walker - Phoenix AZ
Franklyn H. Story - Chandler AZ
David Evoy - Tempe AZ
Michael Crews - Phoenix AZ
Peter Chambers - Scottsdale AZ

Assignee:

VLSI Technology, Inc. - San Jose CA

International Classification:

G06F 1300

US Classification:

395281

Abstract:

A portable computer and corresponding docking station, where the portable computer may be inserted into or removed from the docking station without concern relating to the state of either the portable computer or of the docking station. The hot docking sequence is performed by establishing a direct connection to the primary PCI bus without the risk of any possible system damage, file damage, or data loss. This can be accomplished even while the portable computer system is powered on and is actively running. The present invention prevents glitches from occurring in pre-existing pins and adds four new pins to implement this novel hot docking sequence. Furthermore, hot undocking can be readily performed as well by basically reversing the docking sequence.

US Patent:

56196610, Apr 8, 1997

Filed:

Jun 5, 1995

Appl. No.:

8/486401

Inventors:

Michael R. Crews - Phoenix AZ
Nicholas J. Richardson - Tempe AZ

Assignee:

VLSI Technology, Inc. - San Jose CA

International Classification:

G06F 1314

US Classification:

395299

Abstract:

A dynamic arbitration system for controlling the data transfer between primary and secondary buses in a personal computer has master and target components on both buses. Primary and secondary bus arbiters are included in a bridge circuit, and initially operate independently of one another in a concurrent arbitration mode of operation. This avoids primary bus interruption for secondary-to-secondary transfers and optimizes the primary bus bandwidth. Whenever a secondary-to-primary bus data transfer cycle is detected, the bridge circuit switches the primary and secondary bus arbiters to an interlocked mode of operation. The interlocked arbitration mode of operation is maintained until the next secondary-to-secondary cycle is detected; whereupon the bridge circuit causes the primary and secondary bus arbiters to be switched back to the concurrent arbitration mode of operation.