Michael J Fitzpatrick

US Patent:

20090059675, Mar 5, 2009

Filed:

Aug 28, 2007

Appl. No.:

11/892874

Inventors:

Joseph T. Smith - Columbia MD, US
Dennis A. Adams - Gambrills MD, US
Stephen J. Wrazien - Cranberry PA, US
Michael D. Fitzpatrick - Baltimore MD, US
Philip Smith - Ellicott City MD, US

International Classification:

G11C 11/34
H01L 21/336
H01L 29/94

US Classification:

36518525, 257324, 438287, 257E29309, 257E21423

Abstract:

In one aspect, a radiation hardened transistor includes a buried source, buried drain and a poly-silicon gate separated from the buried source and the buried drain by a buried oxide. A recessed P+ implant or a blanket P+ implant is disposed in a substrate. A portion of the recessed P+ implant or a portion of the blanket P+ implant is disposed beneath outer edges of the poly-silicon gate, in a channel separating the buried source and the buried drain.

US Patent:

45758239, Mar 11, 1986

Filed:

Aug 17, 1982

Appl. No.:

6/409002

Inventors:

Michael D. Fitzpatrick - Linthicum MD

Assignee:

Westinghouse Electric Corp. - Pittsburgh PA

International Classification:

G11C 700
G11C 1140

US Classification:

365184

Abstract:

A non-volatile memory and method is described incorporating an array of variable threshold transistors, a row decoder, a buffer circuit positioned between the array and row decode circuitry, column decode circuitry, and a sense amplifier. The non-volatile memory overcomes the problem of high voltages in the memory array during READ operation. During READ operation the variable threshold transistors operate in the common source mode. A buffer circuit with level shift capability is described incorporating P and N channel transistors. A sense amplifier with decoupling during sensing or lock out is described incorporating P and N channel transistors.

US Patent:

20200026786, Jan 23, 2020

Filed:

Jul 18, 2018

Appl. No.:

16/038682

Inventors:

- Armonk NY, US
David B. Petersen - Great Falls VA, US
Serge Bourbonnais - Palo Alto CA, US
Michael G. Fitzpatrick - Raleigh NC, US
Pamela L. McLean - Raleigh NC, US
John G. Thompson - Tucson AZ, US
Gregory W. Vance - Morgan Hill CA, US
David A. Clitherow - Bracknell, GB

International Classification:

G06F 17/30

Abstract:

A method for resynchronizing at least one batch job is provided. The method may include detecting a type of region switch request. The method may further include stopping execution workloads on a primary system based on the switch request. The method may further include suspending software and hardware data replication from the primary system to the secondary system. The method may further utilizing proxy replication engine to determine a point-in-time (PIT) at which the execution is stopped and the suspension. The method may also include switching the replication of the software and hardware data to occur the secondary system to the primary system. The method may further include synchronizing the software and hardware data up to the determined point-in-time (PIT). The method may also include activating the execution of the plurality of workloads on the secondary system based on the determined point-in-time (PIT), switching, and synchronizing.