Michael Lee Hayden

US Patent:

6341695, Jan 29, 2002

Filed:

May 15, 2000

Appl. No.:

09/571654

Inventors:

Lee Lewis - Murphy TX
Kurodearimasu Takeshi Hirose - Ibaragi, JP
Jeffrey Wilson - Sherman TX
James Dove - Rockwall TX
Michael Hayden - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

B65D 8530

US Classification:

206710, 206303, 206509, 206722

Abstract:

A containment device for retaining semiconductor wafers ( ) which includes a first housing member ( ) having a frame ( ), an inner wall ( ) and an outer wall ( ), the inner wall ( ) and outer wall ( ) having a spaced apart relationship forming a gap ( ) therebetween. The inner wall ( ) closely receives the semiconductor wafers ( ). The containment device also includes a second housing member ( ) that is securably attachable to the first housing member ( ) and which has a frame ( ) that forms the top of the containment device when the first and second housing members ( ) are securably attached together. The first and second housing members are secured by a plurality of latches ( ), each with a hook ( ) secured to the first housing member which passes through a hole ( ) in the second housing member and is releasably secured within the hole by the hook. In accordance with a second embodiment of the invention, the latches and holes of the first embodiment are replaced with a plurality of rotatable latch members ( ) which are secured to the first housing member and are rotatable about a hinge ( ), each latch member ( ) having a hook ( ) at the distal end thereof for engagement with a hole ( ) in the second housing member. One of the walls ( ) of the first embodiment is removed and replaced with a liner of a very soft rubber or foam ( ), preferably of an antistatic variety, which will absorb shock applied to the housing.

US Patent:

6469372, Oct 22, 2002

Filed:

May 10, 2001

Appl. No.:

09/852529

Inventors:

Michael L. Hayden - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2302

US Classification:

257679, 257673, 438112

Abstract:

A carrier and cover tape assemblage for semiconductor devices which maintains integrity through bake temperature of 125 degrees C is provided by cover and carrier tapes of the same material, such as polycarbonate, and thus having the same thermal properties so that the joining adhesive is placed under minimal stress to cause delamination or distortion.

US Patent:

6564946, May 20, 2003

Filed:

Oct 23, 2001

Appl. No.:

09/983088

Inventors:

Lee Lewis - Murphy TX
Kurodearimasu Takeshi Hirose - Ibaragi, JP
Jeffrey Wilson - Sherman TX
James Dove - Rockwall TX
Michael Hayden - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

B65D 8530

US Classification:

206710, 206303, 206509, 206722

Abstract:

A containment device for retaining semiconductor wafers having a first housing member having a frame with inner and outer walls normal to the frame having a gapped relation. The inner wall receives the semiconductor wafers. A second housing member securably attachable to the first housing member by plural latches has a frame forming the top of the device. Each latch has a hook secured to the first housing member passing through a hole in the second housing member and releasably secured within the hole by the hook. In a second embodiment, the latches and holes are replaced with a plurality of rotatable latch members each having a hook at the distal end for engagement with a hole in the second housing member, secured to the first housing member and rotatable about a hinge. One wall of the first embodiment is replaced with a soft liner which absorbs shock.

US Patent:

8277768, Oct 2, 2012

Filed:

Nov 14, 2008

Appl. No.:

12/271329

Inventors:

Michael Louis Hayden - Plano TX, US
Jeffrey Allen Hanson - Allen TX, US
Keith Melcher - McKinney TX, US
Robert Mark Reynolds - Richardson TX, US
Patricia Ann Constandine - Dallas TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

C01B 31/20

US Classification:

423348, 423338

Abstract:

Systems and methods and resulting compositions of matter including silicon solids from a mixture of silicon and water. The mixture is collected at a collection stage from at least one wafer abrasion process performed on a silicon surface having an impurity concentration ≦0. 1 ppb and extracting one portion of the water from the mixture using at least one dryer stage to form a dry cake. The dry cake includes at least 99. 99% silicon by weight excluding water and non-silicon species, where a concentration of water in the dry cake is between 0. 05% and 1% by weight, and where a concentration of non-silicon species in the dry cake is between 0. 05% and 1% by weight.

US Patent:

20130302612, Nov 14, 2013

Filed:

Aug 31, 2012

Appl. No.:

13/601348

Inventors:

Michael Louis HAYDEN - Plano TX, US
Jeffrey Allen HANSON - Allen TX, US
Keith MELCHER - McKinney TX, US
Robert Mark REYNOLDS - Richardson TX, US
Patricia Ann CONSTANDINE - Dallas TX, US

Assignee:

TEXAS INSTRUMENTS INCORPORATED - Dallas TX

International Classification:

C01B 33/02

US Classification:

428402, 34523

Abstract:

Systems and methods and resulting compositions of matter including silicon solids from a mixture of silicon and water. The mixture is collected at a collection stage from at least one wafer abrasion process performed on a silicon surface having an impurity concentration 0.1 ppb and extracting one portion of the water from the mixture using at least one dryer stage to form a dry cake. The dry cake includes at least 99.99% silicon by weight excluding water and non-silicon species, where a concentration of water in the dry cake is between 0.05% and 1% by weight, and where a concentration of non-silicon species in the dry cake is between 0.05% and 1% by weight.

US Patent:

61930687, Feb 27, 2001

Filed:

Apr 22, 1999

Appl. No.:

9/298103

Inventors:

Lee Lewis - Murphy TX
Kurodearimasu Takeshi Hirose - Tsuchiura Ibaragi, JP
Jeffrey Wilson - Sherman TX
James Dove - Rockwall TX
Michael Hayden - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

B65D 8530
B65D 8502
B65D 2102

US Classification:

206710

Abstract:

A containment device for retaining semiconductor wafers (54) is disclosed. The containment device comprises a first housing member (10) having a frame (12), an inner wall (14) and an outer wall (16). The inner wall (14) and outer wall (16) each extend generally perpendicularly from the frame (12). The inner wall (14) and outer wall (16) have a spaced apart relationship forming a gap (18) therebetween. The inner wall (14) closely receives the semiconductor wafers (54). The containment device also comprises a second housing member (36) that is securably attachable to the first housing member (10). The second housing member (36) has a frame (38) that forms the top of the containment device when the first and second housing members (10, 36) are securably attached together.