Michael T Lin

US Patent:

20110099421, Apr 28, 2011

Filed:

Aug 11, 2010

Appl. No.:

12/854490

Inventors:

Alessandro Geist - Bethesda MD, US
Thomas P. Flatley - Hungtington MD, US
Michael R. Lin - Ellicott City MD, US
David J. Petrick - Severna Park MD, US

International Classification:

G06F 11/16

US Classification:

714 10, 714E11061

Abstract:

A processing system having a small form factor and configured to connect to an external platform. The processing system includes input interfaces configured to receive an input signal to be processed; a radiation tolerant field programmable gate array including processors configured to process the input signal; memory containing reconfigurable instructions for the processors that, when the reconfigurable instructions are executed, process the input signal and obtain the output signal; output interfaces configured to send the output signal to the external platform; and a reset logic element configured to selectively reset the field programmable gate array and at least one of the processors in response to a reset command. The input interfaces include at least one gigabit Ethernet interface and at least one space-rated balanced voltage digital interface circuit. The output interfaces include at least one serial advanced technology attachment interface and at least one space-rated balanced voltage digital interface circuit.