Michael Lin

US Patent:

20040246987, Dec 9, 2004

Filed:

Mar 5, 2004

Appl. No.:

10/794604

Inventors:

Evan Webb - Elkridge MD, US
Michael Lin - Ellicott City MD, US
Scott Edfors - Silver Spring MD, US

International Classification:

H04L012/66

US Classification:

370/463000, 370/419000

Abstract:

A space qualified local area network includes a plurality of stations, a switch in communication with the plurality of stations, and a network interface controller associated with each station. The network interface controller includes a media access controller having a medium-independent interface and a physical layer. The physical layer includes a data-strobe encoder for combining a first data signal and a strobe signal to produce an output signal, a low voltage differential signaling driver for transmitting the output signal, a low voltage differential signaling receiver for receiving an input signal, and a clock recovery decoder for extracting a second data signal and a clock signal from the input signal.

US Patent:

20130181809, Jul 18, 2013

Filed:

Jul 18, 2012

Appl. No.:

13/551649

Inventors:

Michael R. Lin - Ellicott City MD, US
David J. Petrick - SEVERNA PARK MD, US
ALESSANDRO GElST - BETHESDA MD, US
Thomas P. Flatley - Huntington MD, US

International Classification:

G05B 19/02

US Classification:

340 43

Abstract:

An on-board space processing system capable of processing data at more than 2500 Million Instructions Per Second on board a spacecraft is disclosed. The system may be a cube, and may include processor card and a hybrid card. The processor card may include a processor that may be programmable and reprogrammable prior to, and during, spaceflight. The hybrid card may include a field programmable gate array module that may program and reprogram the processor prior to, and during, the spaceflight.

US Patent:

20170358877, Dec 14, 2017

Filed:

Jun 10, 2016

Appl. No.:

15/179020

Inventors:

- Washington DC, US
MICHAEL R. LIN - ELLICOTT CITY MD, US

International Classification:

H01R 12/70

Abstract:

A stacking pin alignment fixture for a stacking connector includes a substrate and a plurality of openings defined in the substrate, the plurality of openings being arranged in a predefined pattern. The predefined pattern corresponds to a pattern of a field of straight pins arranged on the stacking connector.