Michael S Mckinney

US Patent:

6377650, Apr 23, 2002

Filed:

Aug 14, 2000

Appl. No.:

09/638830

Inventors:

Brian T. Deng - Richardson TX
Michael D. McKinney - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03K 2300

US Classification:

377118, 327141, 710 33, 710 61

Abstract:

An improved counter register ( ) and method of transferring data from a host data bus ( ) controlled by a first clock source (BCLK) to the cycle timer ( ) controlled by a second clock source (NCLK) which frees the host data bus ( ) to perform other functions while a clock synchronization process occurs to allow the data ( ) to be written to the counter register ( ) or read from the counter register ( ). This synchronization scheme is such that at any time the host data bus ( ) may read data ( ) from the cycle timer ( ) and retrieve the current counter register value. In the alternative, at any time, the host data bus ( ) may write to the cycle timer ( ) and it will receive this data ( ) immediately. In either case, the data is transferred immediately without the host data bus ( ) having to wait for synchronization across the aforementioned clock boundary.