Michael A Perrone

US Patent:

8412862, Apr 2, 2013

Filed:

Dec 18, 2008

Appl. No.:

12/337703

Inventors:

Jizhu Lu - Newark DE, US
Michael P. Perrone - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 3/00

US Classification:

710 20, 710 1, 710 5, 710 7, 710 15, 710 22

Abstract:

A mechanism is provided for improving the efficiency of multiple smaller direct memory access transfers. The mechanism uses one input buffer and a small result buffer, or some temporary variables, to temporarily store computation results. The mechanism performs a computation on a segment of data in the input buffer and stores the result in the temporary result buffer. The mechanism then copies the result back into the input buffer. As such, the mechanism uses the input buffer as both an input buffer and a results buffer. The mechanism then performs a direct memory access transfer on the segment of the input buffer that contains the computation result and then performs a computation on the next segment of the input buffer. The mechanism then repeats this process until the entire input buffer has been processed.