Michael R Poponiak

US Patent:

41446364, Mar 20, 1979

Filed:

Aug 8, 1977

Appl. No.:

5/822589

Inventors:

Paul J. Burkhardt - Poughkeepsie NY
Michael R. Poponiak - Newburgh NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

B01J 1700

US Classification:

29590

Abstract:

A method and resulting structure for a relative humidity monitor which can be built into an integrated circuit chip. A small area on a silicon chip is made porous by anodic etching. This region is then oxidized and a metal counter electrode is deposited over part of the porous area. The surface area in the dielectric under the counter electrode is very high and because of the openness of the structure, ambient moisture can quickly diffuse into the dielectric under the electrode and adsorb onto the silicon dioxide surface. Changes in ambient humidity will then be reflected by measurable changes in capacitance or conductance of the device.

US Patent:

40593851, Nov 22, 1977

Filed:

Jul 26, 1976

Appl. No.:

5/708527

Inventors:

Louis Gulitz - Yorktown Heights NY
Theodore William Kwap - Brewster NY
Walter Irving Lisle - Stone Ridge NY
Daniel Francis O'Kane - Morgan Hill CA
Michael Robert Poponiak - Newburgh NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

F23N 510

US Classification:

431 12

Abstract:

A real time monitoring and control system for single or multi-fired combustion systems which permits adjustment of the air fuel ratio in the system for optimized efficiency and minimized pollution content in the exhaust gas, while providing safety control of the combustion process. The system includes a high sensitivity light sensor which is utilized to monitor the combustion flame and provide an electrical output proportional to flame temperature, that is utilized to control the air fuel ratio of the system. The wavelength sensitivity of the sensor is capable of selection, for example by selection of sensor type and/or use of appropriate filters, to monitor a predetermined range or region of the flame emission spectrum in order to enable correlation of the intensity of the emission spectrum of the type of fuel being utilized, i. e. , oil or natural gas, with temperature and combustion efficiency. A sensor having a defined field of view is utilized and means are provided to sample signals from selected portions of the field of view of the sensor to enable temperature monitoring of a multi-flame system.

US Patent:

39829677, Sep 28, 1976

Filed:

Mar 26, 1975

Appl. No.:

5/562370

Inventors:

Charles A. Pillus - Wappingers Falls NY
Michael R. Poponiak - Newburgh NY
Robert O. Schwenker - Hopewell Junction NY

Assignee:

IBM Corporation - Armonk NY

International Classification:

H01L 21263

US Classification:

148 15

Abstract:

In integrated circuit fabrication, a method is provided for simultaneously forming two regions of the same conductivity-type such as the base and isolation regions. In one embodiment, an epitaxial layer of one conductivity-type is formed on a substrate of opposite conductivity-type, after which dopant ions of the opposite conductivity-type are introduced into the epitaxial surface areas which are to provide the base and isolation regions, and in addition, the isolation regions are bombarded with non-dopant ions having a maximum atomic number of two, e. g. , hydrogen or helium ion while the base regions are appropriately masked and remain umbombarded, said bombardment is carried out at temperatures below 300. degree. C, preferably room temperature. The bombardment is preferably carried out so that the non-dopant ions are implanted primarily in regions below the isolation regions.

US Patent:

40281493, Jun 7, 1977

Filed:

Jun 30, 1976

Appl. No.:

5/701452

Inventors:

John L. Deines - Pleasant Valley NY
Michael R. Poponiak - Newburgh NY
Paul J. Tsang - Poughkeepsie NY

Assignee:

IBM Corporation - Armonk NY

International Classification:

H01L 2176
H01L 2120
H01L 2704

US Classification:

148175

Abstract:

A method for forming monocrystalline silicon carbide on a silicon substrate by converting a portion of the monocrystalline silicon substrate into a porous silicon substance by anodic treatment carried out in an aqueous solution of hydrofluoric acid, heating the resultant substrate to a temperature in the range of 1050. degree. C to 1250. degree. C in an atmosphere that includes a hydrocarbon gas for a time sufficient to react the porous silicon and the gas, thereby forming a layer of monocrystalline silicon carbide on the silicon substrate.

US Patent:

40578232, Nov 8, 1977

Filed:

Jul 2, 1976

Appl. No.:

5/701788

Inventors:

Paul Johannes Burkhardt - Poughkeepsie NY
Michael Robert Poponiak - Newburgh NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 2934
H01L 2316
H01L 2336

US Classification:

357 52

Abstract:

A method and resulting structure for a relative humidity monitor which can be built into an integrated circuit chip. A small area on a silicon chip is made porous by anodic etching. This region is then oxidized and a metal counter electrode is deposited over part of the porous area. The surface area in the dielectric under the counter electrode is very high and because of the openness of the structure, ambient moisture can quickly diffuse into the dielectric under the electrode and adsorb onto the silicon dioxide surface. Changes in ambient humidity will then be reflected by measurable changes in capacitance or conductance of the device.

US Patent:

43332277, Jun 8, 1982

Filed:

Jan 12, 1981

Appl. No.:

6/224705

Inventors:

Cheng T. Horng - San Jose CA
Michael R. Poponiak - Newburgh NY
Hans S. Rupprecht - Yorktown Heights NY
Robert O. Schwenker - San Jose CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21302
H01L 2131

US Classification:

29580

Abstract:

A method for device fabrication utilizing a self-aligned process. A combination of advanced semiconductor processing techniques including Deep Dielectric Isolation by reactive-ion etching, etching and refilling, planarizing with oxides and resists, and differential thermal oxidation are used to form devices having small vertical as well as horizontal dimensions. The device region is surrounded by a deep oxide trench which has nearly vertical sidewalls which extend from the epitaxial silicon surface through the N+ subcollector region into the P substrate. The width of the deep trench is about 2. mu. m to 3. mu. m. A shallow oxide trench extends from the epitaxial silicon surface to the upper portion of the N+ subcollector and separates the base and collector contact. The surface of the isolation regions and the silicon where the transistor is formed is coplanar. As shown in FIG.

US Patent:

39620522, Jun 8, 1976

Filed:

Apr 14, 1975

Appl. No.:

5/567656

Inventors:

Shakir A. Abbas - Wappingers Falls NY
Robert C. Dockerty - Highland NY
Michael R. Poponiak - Newburgh NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

C25F 300

US Classification:

2041293

Abstract:

A process for forming holes with precisely controlled dimension and position in monocrystalline silicon wafers wherein the holes are fabricated with vertical sides. In the preferred process, both sides of the silicon body are masked, opposite registered openings made in the masking layers, an impurity introduced through the openings into the body forming low resistivity regions, the body anodically etched through the openings until a porous silicon region is formed completely through the body, and subsequently removing the resultant porous silicon region with a silicon etchant.

US Patent:

41804392, Dec 25, 1979

Filed:

Jul 25, 1977

Appl. No.:

5/818476

Inventors:

John L. Deines - Pleasant Valley NY
Michael R. Poponiak - Newburgh NY
Robert O. Schwenker - Hopewell Junction NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01N 2746

US Classification:

204 1T

Abstract:

Electrically active defects, i. e. , current-carrying defects or leakage paths in silicon crystals, are detected by an anodization process. The process selectively etches the crystal surface only where the electrically active defects are located when the anodization parameters are properly selected. Selected surface portions of the silicon structure are exposed to a hydrofluoric acid solution which is maintained at a negative potential with respect to the silicon structure. When the potential difference is set to a proper value, etch pits are formed in the surface of the silicon only at those locations overlying electrically active defects which impact device yield. The defects are observed and counted to provide a basis to predict yield of desired semi-conductor devices to be formed later in the silicon structure.