Michael P Rice

US Patent:

8578357, Nov 5, 2013

Filed:

Dec 21, 2009

Appl. No.:

12/643216

Inventors:

Michael P. Rice - Beaverton OR, US
Hugh Wilkinson - Newton MA, US
Maximillian J. Domeika - Sherwood OR, US
Evgueni V. Brevnov - Berdsk, RU
Peter Lachner - Heroldstatt, DE

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 9/45

US Classification:

717159, 717114

Abstract:

In one embodiment of the invention code (e. g. , compiler, tool) may generate information so a first code portion, which includes a pointer value in a first endian format (e. g. , big endian), can be properly initialized and executed on a platform having a second endian format (e. g. , little endian). Also, various embodiments of the invention may identify problematic regions of code (e. g. , source code) where a particular byte order is cast away through void pointers.

US Patent:

20110154306, Jun 23, 2011

Filed:

Dec 21, 2009

Appl. No.:

12/643006

Inventors:

Maximillian J. Domeika - Sherwood OR, US
Hugh Wilkinson - Newton MA, US
Michael P. Rice - Beaverton OR, US

International Classification:

G06F 9/45

US Classification:

717141

Abstract:

An embodiment of the invention includes code, such as a compiler, that enables byte order dependent code to execute on opposite byte order dependent architectures or systems. The compiler analyzes source code and produces diagnostic reports that indicate where source code changes are desirable to produce “endian neutral” source code versions that are compatible with opposite byte order dependent architectures or systems. Such source code changes may be desirable for code portions that will produce implicit byte order changes or byte order border crossings. The modified source code that is generated may include the semantics of the desired endian conversion, as opposed to generated executable code that includes proper endian formats but which may limit the architectures to which the code is applicable.