Michael N Wolf

US Patent:

7117318, Oct 3, 2006

Filed:

Nov 4, 2003

Appl. No.:

10/701388

Inventors:

Gil Tene - San Carlos CA, US
Cliff N. Click - San Jose CA, US
Michael A. Wolf - San Francisco CA, US
Ivan Posva - Menlo Park CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 12/00

US Classification:

711154, 711100, 711151, 711158, 711165, 711170

Abstract:

A technique for managing an object in memory is disclosed. The technique comprises: assigning the object to an assigned frame wherein the object can be released when the assigned frame is released; detecting an attempt to place a reference to the object in an older frame, the older frame being older than the assigned frame; and reassigning the object to a reassignment frame that is at least as old as the older frame.

US Patent:

7257685, Aug 14, 2007

Filed:

Aug 11, 2006

Appl. No.:

11/503388

Inventors:

Gil Tene - San Carlos CA, US
Cliff N. Click - San Jose CA, US
Michael A. Wolf - San Francisco CA, US
Ivan Posva - Menlo Park CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 12/00

US Classification:

711154, 711100, 711147, 711165, 711170, 717148, 717151, 717154, 717159

Abstract:

Improving performance of a computer program is disclosed. A first set of escape data is gathered. A first compiled program is provided using the first set of escape data. A second set of escape data is gathered based on the first compiled program. A second compiled program is provided using the second set of escape data. The second compiled program is more optimized than the first compiled program.

US Patent:

7278005, Oct 2, 2007

Filed:

Apr 1, 2004

Appl. No.:

10/816471

Inventors:

Michael A. Wolf - San Francisco CA, US
Gil Tene - San Carlos CA, US
Luca Andrea Castellano - Mountain View CA, US

Assignee:

Azul Systems, Inc. - Montain View CA

International Classification:

G06F 12/00

US Classification:

711170, 707205, 707206

Abstract:

A method for managing memory in some embodiments comprises maintaining a memory pool, and specifying an amount of memory required for allocation. In some embodiments, the method also comprises requesting a process to release memory into the memory pool. In some embodiments, the method also comprises allocating an amount of the memory pool to a process. In some embodiments, the method comprises maintaining a memory pool, receiving status information from a plurality of processes, and managing memory among the plurality of processes using the status information.

US Patent:

7469324, Dec 23, 2008

Filed:

Jan 7, 2005

Appl. No.:

11/031015

Inventors:

Gil Tene - San Carlos CA, US
Michael A. Wolf - San Francisco CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 12/00

US Classification:

711159, 711133, 711154, 711170, 707206

Abstract:

A method, system, and computer program product for managing a heap of memory allocated to a program being executed on a data processing system is disclosed. A limited amount of memory is allocated to a program being executed by a mutator on a data processing system. The memory comprises memory objects. The disclosed method identifies memory objects, which are allocated to the program but are not referenced anymore. These dead memory objects are freed and made available for further allocation in the program. The memory objects that are still referenced are organized in compact contiguous blocks. Thus, the disclosed method recycles memory allocated to the program. The disclosed method is executed iteratively and concurrently with the execution of the program. The disclosed method does not interfere with program execution. Amount of memory required is specified before the commencement of the disclosed method and the same amount is freed without any surplus.

US Patent:

7480908, Jan 20, 2009

Filed:

Jun 24, 2005

Appl. No.:

11/165827

Inventors:

Gil Tene - San Carlos CA, US
Michael A. Wolf - San Francisco CA, US
Anirban Sengupta - Sunnyvale CA, US
Sivakumar Annamalai - Cupertino CA, US
Adrian Sun - Mountain View CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 9/455
G06F 15/16

US Classification:

718 1, 709201

Abstract:

Providing data to an application running on a segmented virtual machine (VM) is disclosed. Providing data includes opening an interface between the segmented VM and an external data source, transferring data from the external data source to an interface buffer, transferring a first selected amount of data from the interface buffer to a shell VM buffer, transferring a second selected amount of data from the shell VM buffer to a core VM buffer, and providing portions of the data from the core VM buffer to the application in response to read requests from the application.

US Patent:

7565507, Jul 21, 2009

Filed:

Aug 20, 2007

Appl. No.:

11/894434

Inventors:

Michael A. Wolf - San Francisco CA, US
Gil Tene - San Carlos CA, US
Luca Andrea Castellano - Mountain View CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 12/00

US Classification:

711170, 707205, 707206

Abstract:

A computer system includes a memory and a processor coupled with the memory, configured to assign to each of a plurality of processes a corresponding amount of committed memory from a memory pool, the memory pool including committed memory and uncommitted memory; and dynamically allocate an additional amount of memory required by one of the plurality of processes from the uncommitted memory in the memory pool. Managing memory includes assigning to each of a plurality of processes a corresponding amount of committed memory from a memory pool, the memory pool including committed memory and uncommitted memory; and dynamically allocating an additional amount of memory required by one of the plurality of processes from the uncommitted memory in the memory pool.

US Patent:

7647458, Jan 12, 2010

Filed:

Apr 8, 2008

Appl. No.:

12/082239

Inventors:

Gil Tene - Los Altos Hills CA, US
Michael A. Wolf - San Francisco CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 12/00

US Classification:

711159, 707200, 707206

Abstract:

A computer system includes a processor; and a memory coupled to the processor, configured to provide the processor with a plurality of instructions including a garbage collection barrier instruction and a subsequent instruction that immediately follows the garbage collection barrier instruction; wherein the processor is configured to execute the garbage collection barrier instruction, including by: evaluating a memory reference to determine a condition associated with the garbage collection barrier instruction; and in the event that the condition is met, while maintaining the same privilege level, saving information that is based at least in part on the current value of a program counter, and setting the program counter to correspond to a target location that is other than the location of the subsequent instruction.

US Patent:

7689782, Mar 30, 2010

Filed:

Dec 6, 2005

Appl. No.:

11/296195

Inventors:

Jack Choquette - Mountain View CA, US
Gil Tene - Los Altos Hills CA, US
Michael A. Wolf - San Francisco CA, US

Assignee:

Azul Systems, Inc. - Mountain View CA

International Classification:

G06F 13/00

US Classification:

711152, 711153, 711173, 707206, 712244

Abstract:

An instruction used by a processor in a determination of whether to perform a trap is disclosed. The instruction includes a first set of one or more bits identifying the instruction, and a second set of one or more bits associated with a first address value used in the determination. The determination does not include performing a memory access that uses the first address value to determine a memory location of the memory access. The determination is based at least in part on more than one of the following: a group of one or more marker bits included in the first address value, a matrix entry located at least in part using one or more bits of the first address value, a Translation Look-aside Buffer entry associated with the first address value, whether the first address value is associated with stack allocated memory, and whether the first address value includes a null value.