Michelle A Baldwin

US Patent:

43266401, Apr 27, 1982

Filed:

Jul 10, 1980

Appl. No.:

6/167233

Inventors:

Nadine R. Nitzberg - Randallstown MD
Michelle L. Baldwin - Laurel MD
Steven M. Baldwin - Laurel MD

International Classification:

B65D 2102
A45C 1120
A47G 2304

US Classification:

220 4E

Abstract:

Improvement in a series of containers vertically stackable includes said containers inter-sealing in combination to form several compartments, and including top element in the form of a feeding pan downwardly oriented, upper element in the form of an open top container closable by the top element and with a downwardly oriented feeding pan on the bottom, intermediate element of the feeding pans back-to-back, and lower element in the form of an open top container connectable by the intermediate element to the lower element.

US Patent:

20210405108, Dec 30, 2021

Filed:

Sep 9, 2021

Appl. No.:

17/470424

Inventors:

- Beaverton OR, US
Daniel S. Froelich - Portland OR, US
Michelle L. Baldwin - Mount Juliet TN, US
Jonathan San - Palo Alto CA, US
Lin-Yung Chen - New Taipei, TW

Assignee:

Tektronix, Inc. - Beaverton OR

International Classification:

G01R 31/28

Abstract:

Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link with a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

US Patent:

20210406144, Dec 30, 2021

Filed:

Jun 25, 2021

Appl. No.:

17/359261

Inventors:

- Beaverton OR, US
Daniel S. Froelich - Portland OR, US
Michelle L. Baldwin - Mount Juliet TN, US
Jonathan San - Palo Alto CA, US
Lin-Yung Chen - New Taipei, TW

Assignee:

Tektronix, Inc. - Beaverton OR

International Classification:

G06F 11/26
G06F 11/24

Abstract:

A test and measurement system for analyzing a device under test, including a database configured to store test results related to tests performed with one or more prior devices under test, a receiver to receive new test results about a new device under test, a data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.

US Patent:

20210297882, Sep 23, 2021

Filed:

Mar 19, 2021

Appl. No.:

17/207091

Inventors:

- Beaverton OR, US
Andrew McCann - Beaverton OR, US
Daniel S. Froelich - Portland OR, US
Michelle L. Baldwin - Mount Juliet TN, US
Jonathan San - Palo Alto CA, US
Lin-Yung Chen - New Taipei, TW

Assignee:

Tektronix, Inc. - Beaverton OR

International Classification:

H04W 24/08
G01R 35/00

Abstract:

Systems and methods for automated recognition of a device under test and retrieving data associated with the device under test based on the recognition. The systems and methods include receiving a recognition key based on an identifying characteristic of the device under test, matching the received recognition key to a stored key in a database, retrieving data related to the stored key when the received recognition key matches the stored key, transmitting instructions to perform an action on a test and measurement device based on the retrieved data, receiving new data related to the device under test, and updating the data in the database related to the stored key with the new data.