Mike Fai Chen

US Patent:

D534821, Jan 9, 2007

Filed:

Dec 21, 2004

Appl. No.:

29/219634

Inventors:

Mike Chen - Irvine CA, US

International Classification:

1005

US Classification:

D10104, D10 32

US Patent:

D539687, Apr 3, 2007

Filed:

Dec 21, 2004

Appl. No.:

29/219635

Inventors:

Mike Chen - Irvine CA, US

International Classification:

1005

US Classification:

D10119

US Patent:

7277337, Oct 2, 2007

Filed:

Sep 25, 2006

Appl. No.:

11/309782

Inventors:

Ramon S. Co - Trabuco Canyon CA, US
Mike Chen - Newport Coast CA, US
David Sun - Irvine CA, US

Assignee:

Kingston Technology Corp. - Fountain Valley CA

International Classification:

G11C 29/00

US Classification:

365200, 365201

Abstract:

A downgraded memory module has downgraded DRAM chips soldered to its substrate. The downgraded DRAM chips have a defective memory cell in a logical quadrant of the memory. A physical MSB is a row address present on a non-downgraded DRAM of size S but not used on a downgraded DRAM size S/2. The physical MSB and a second address pin are non-multiplexed address pins that do not carry column addresses. The physical MSB and the second address pin logically divided the DRAM into quadrants. Two good quadrants without defects are selected, and jumpers on the memory module drive the physical MSB and the second address pin with signals that select only these two quadrants and disable access to quadrants containing defects. DRAM chips can be marked or sorted into bins for combinations of good quadrants. Downgraded memory modules have all DRAM chips from the same bin that share jumper settings.

US Patent:

D588335, Mar 17, 2009

Filed:

Apr 21, 2008

Appl. No.:

29/317009

Inventors:

Mike Chen - Rowland Heights CA, US

International Classification:

0202

US Classification:

D 2717

US Patent:

D591882, May 5, 2009

Filed:

Jan 23, 2008

Appl. No.:

29/302725

Inventors:

Mike Chen - Irvine CA, US

International Classification:

2605

US Classification:

D26 60

US Patent:

7642105, Jan 5, 2010

Filed:

Nov 23, 2007

Appl. No.:

11/944551

Inventors:

Ramon S. Co - Trabuco Canyon CA, US
Mike Chen - Newport Coast CA, US
David Sun - Irvine CA, US

Assignee:

Kingston Technology Corp. - Fountain Valley CA

International Classification:

H01L 21/66
G01R 31/26
G11C 29/00

US Classification:

438 17, 365200, 257E25011

Abstract:

A manufacturing method makes memory modules from partially-good DRAM chips soldered to its substrate. The partially-good DRAM chips have a number of defective memory cells that is below a test threshold, such as 10%. Packaged DRAM chips are optionally pre-screened and considered to pass when the number of defects found is less than the test threshold. A defect table is created during testing and written to a serial-presence-detect electrically-erasable read-only memory (SPD-EEPROM) on the memory module. The memory module is finally tested on a target-system tester that reads the defect table during booting, and redirects memory access to defective memory locations identified by the defect table. The memory modules may be burned in or tested at various temperatures and voltages to increase reliability.

US Patent:

8059002, Nov 15, 2011

Filed:

Jul 25, 2008

Appl. No.:

12/219644

Inventors:

Mike Chen - Irvine CA, US

International Classification:

G08B 23/00

US Classification:

3405736

Abstract:

A pool guard alarm apparatus includes an alarm body, a triggering device and a relative triggering element. The alarm body accommodates a circuit board and a battery for providing a power source. The circuit board is provided with several buttons and a sound member. The buttons enable an authorized person to bypass the alarm mode. The triggering device located at the entrance to the pool has a movable part which is elastic to be against the relative triggering element. The moveable part will produce a triggering signal to the circuit board when the entrance is opened. The circuit board activates the sound member to produce an alarm sound after a predetermined time. The alarm sound is repeated after a period of time while in the alarm mode. When the entrance is then closed, the user must reset a pass code to activate the said alarm mode.

US Patent:

20060187066, Aug 24, 2006

Filed:

Feb 22, 2005

Appl. No.:

11/061032

Inventors:

Mike Chen - Irvine CA, US

International Classification:

G08B 13/00
G08B 7/00
G08B 23/00

US Classification:

340574000, 340815690, 340691500, 340693900

Abstract:

An armlet-type alarm includes a main body having a control circuit and a buzzer mounted therein, and a length-wise adjustable fastening band connected to the main body. The main body is provided at a top with a large-sized alarm push button assembly having a light-emitting device located therein, and a light-up switch for actuating the light-emitting device to emit light intermittently. One side of the main body includes a sound box, which uses a user's arm as one sidewall thereof and has a plurality of sound apertures provided therein. The armlet-type alarm may emits an intermittent warning light if so desired, and may be caused to emit a loud sound in an emergency simply by clapping the alarm push button assembly to actuate the buzzer inside the main body of the alarm.