Minh Diem Vu

US Patent:

7630385, Dec 8, 2009

Filed:

Aug 4, 2006

Appl. No.:

11/462669

Inventors:

Randy I. Oyadomari - San Jose CA, US
George A. Bullis - Glendora CA, US
Minh Q. Vu - San Jose CA, US

International Classification:

H04Q 11/00
H04L 12/28
G06F 15/16
G06F 11/00

US Classification:

370400, 370218, 370252, 370386, 370466, 709220, 709238, 709250, 714 11, 714 27, 714 46, 714 57

Abstract:

Creation of port domains in a multi-chassis system. The multi-chassis system includes two or more chassis that each includes one or more blades. In one embodiment, a sync group of at least two chassis is created, typically by connecting the two or more chassis with an interconnection means such as a sync-cable. Then, two or more ports of the sync group are selected for inclusion in a port domain. The locations of the ports relative to each other is then determined. Finally, a port domain is generated based on the relative locations of the ports and port domain generation rules. If the ports are on separate chassis, then a global domain is generated if a predetermined number of global domains do not already exist and if the ports are on the same chassis, a local domain is generated regardless of the number of global domains.

US Patent:

7764695, Jul 27, 2010

Filed:

Sep 25, 2006

Appl. No.:

11/534916

Inventors:

Randy I. Oyadomari - San Jose CA, US
George A. Bullis - Glendora CA, US
Minh Q. Vu - San Jose CA, US

International Classification:

H04Q 11/00
H04L 12/56

US Classification:

370400, 370218, 370252, 370386, 370466, 709220, 709238, 709250, 714 11, 714 27, 714 46, 714 57

Abstract:

A multi-chassis system includes at least a first chassis and a second chassis that each includes one or more blades. The one or more blades in turn include one or more ports. The two or more chassis are connected through use of an interconnector. The multi-chassis system may also include access to one or more microprocessors that may execute thereon software that controls the propagation of the arm condition. The arm condition is generated at a first port of a first chassis or network analyzer blade coupled to the first chassis. The arm condition is then transmitted to one or more additional ports of the first chassis while not being transmitted to any ports of the second chassis. Finally, the reception of a precondition for triggering defined by the arm condition is limited to those ports that have received the arm condition.

US Patent:

8468037, Jun 18, 2013

Filed:

Mar 28, 2012

Appl. No.:

13/432788

Inventors:

Geoffrey Clarke - Foster City CA, US
Kenneth William Branson - Los Altos CA, US
Minh Vu - Milpitas CA, US

Assignee:

Guidewire Software, Inc. - Foster City CA

International Classification:

G06Q 40/08

US Classification:

705 4

Abstract:

Managing risks associated with reinsurance includes: obtaining a plurality of insurance policies, each of the plurality of insurance policies comprising a plurality of coverages; identifying, for each insurance policy in the plurality of insurance policies, a set of coverages that corresponds to a geographical location, a policy level liability, or a covered item; and evaluating, for each identified set of coverages, a corresponding reinsurable risk, the evaluation includes determining a total insured value associated with the corresponding reinsurable risk.

US Patent:

59561688, Sep 21, 1999

Filed:

Sep 5, 1997

Appl. No.:

8/924852

Inventors:

Frank H. Levinson - Palo Alto CA
William R. Freeman - Castro Valley CA
Daniel S. Kane - San Francisco CA
Minh Q. Vu - San Jose CA

Assignee:

Finisar Corporation - Mountain View CA

International Classification:

H04B 1000

US Classification:

359152

Abstract:

A dual optical fiber transceiver, for use with first and second optical fibers, includes a laser transmitter for transmitting laser light into the first optical fiber, a laser light receiver for receiving laser light from the second optical fiber, and a controller coupled to the laser transmitter and laser light receiver. The controller includes a multi-protocol state machine for establishing the full duplex connection whenever the other device operates in compliance with either (A) a predefined "on-off-on" signaling protocol for establishing full duplex connections, or (B) a second predefined signaling protocol for establishing full duplex connections. In a preferred embodiment, the predefined "on-off-on" signaling protocol is the Open Fiber Control (OFC) protocol and the second predefined signaling protocol is a standard "laser transmitter always on" protocol. In the preferred embodiment, the multi-protocol state machine disables operation of the laser transmitter whenever a loss of light condition is detected by the transceiver's laser light receiver that is not in compliance with the OFC protocol.

US Patent:

56047355, Feb 18, 1997

Filed:

May 12, 1995

Appl. No.:

8/440088

Inventors:

Frank H. Levinson - Palo Alto CA
Mark J. Farley - Napa CA
Minh Q. Vu - San Jose CA
Calvin P.-K. Leung - Newark CA

Assignee:

Finisar Corporation - CA

International Classification:

H04Q 1104

US Classification:

370360

Abstract:

The present invention provides an improvement in circuit switching for a network comprising a switching apparatus including a plurality of transceivers for interfacing directly with a like plurality of nodes. Each of the transceivers has a receive and transmit through port for passing data to and from nodes. Transmitted data includes a connect/disconnect sequence, a first wait sequence, and user data. The switching apparatus further includes circuitry for isolating each transceiver so as to loop back data when not in use and a switching matrix for directly connecting any pair of transceivers. Each of the transceivers includes circuitry for detecting a connect and disconnect sequence and an interface for connection to a serial asynchronous receiver to derive node requests, routing data, priority and other information from the connect sequence detected at the transceiver. Derived switch configuration requests are processed by a node route control state machine, with each node route control state machine integrated in a bus architecture for configuring the matrix switch. A bus arbitration state machine controls the bus architecture servicing bus requests and providing bus grants for the transfer of routing information to switch control logic and a command sequencer.