Minlong Lin

age ~70

from East Windsor, NJ

Also known as:
  • Min Long Lin
  • Min L Lin
  • Mark Lin
  • Long Min Lin
  • Min L Linmin
  • Lin L Min
  • Lin Minlong
  • In-Long M Lin

Minlong Lin Phones & Addresses

  • East Windsor, NJ
  • Plainsboro, NJ
  • Princeton, NJ
  • Cambridge, MA

Us Patents

  • Integrating Pixels And Methods Of Operation

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  • US Patent:
    20150281612, Oct 1, 2015
  • Filed:
    Apr 1, 2014
  • Appl. No.:
    14/242597
  • Inventors:
    - Princeton NJ, US
    Patrick Kuschak - Brooklyn NY, US
    Minlong Lin - Plainsboro NJ, US
    Robert Brubaker - Freehold NJ, US
  • Assignee:
    Sensors Unlimited, Inc. - Princeton NJ
  • International Classification:
    H04N 5/378
    H01L 27/146
  • Abstract:
    A pixel cell includes a first integration capacitor, a second integration capacitor, a photo detector and a transistor. The first integration capacitor includes a first lead operatively coupled to the photo detector. The second integration capacitor includes a first lead. The transistor is operatively coupled between the leads of the first and second integration capacitors for enabling current flow between the photo detector and the second integration capacitor only once a threshold voltage is met on the first integration capacitor.
  • Systems And Methods For Image Lag Mitigation For Buffered Direct Injection Readout With Current Mirror

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  • US Patent:
    20140340154, Nov 20, 2014
  • Filed:
    May 15, 2013
  • Appl. No.:
    13/895288
  • Inventors:
    - PRINCETON NJ, US
    Minlong Lin - Princeton NJ, US
  • International Classification:
    H03F 3/345
  • US Classification:
    330288
  • Abstract:
    Embodiments relate to systems and methods for image lag mitigation for a buffered direct injection readout circuit with current mirror. A photo detector device is coupled to a buffered direct injection (BDI) circuit, in which an operational amplifier and other elements communicate the output signal from the detector to subsequent stages. The BDI output is transmitted to a first current mirror, which can be implemented as a Säckinger current mirror. The first current mirror is coupled to a second current mirror, one of whose outputs is a fixed bias current. Image lag can be controlled by the fixed bias current, rather than the photocurrent produced directly by the optical detector. In aspects, the negative feedback provided by the first current mirror can increase the modulation of the second current mirror. This gain factor can reduce image lag to a significantly lower point than the lag experienced by known BDI-current-modulated readout circuitry without Säckinger current mirror.

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