Mohammad Odeh

US Patent:

7656224, Feb 2, 2010

Filed:

Mar 16, 2005

Appl. No.:

11/081918

Inventors:

Raul A. Perez - Richardson TX, US
Mohammad Ali Odeh Al-Shyoukh - Richardson TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G05F 1/10

US Classification:

327540, 327541, 327543, 323282, 323284

Abstract:

The buffer circuit includes a first transistor MP having a first end coupled to an output node N and a control node coupled to an input node N; a second transistor MN coupled to a second end of the first transistor MP; a third transistor MN coupled to the second transistor MN such that a current in the third transistor MN is mirrored to the second transistor MN; a first sense device MP coupled to the output node N; a first current source I coupled to the output node N; a second current source I coupled to the third transistor MN; a second sense device MP coupled to the third transistor MN; and a bipolar device Q coupled to the output node N and having a base coupled to the second end of the first transistor MP.