Mohiuddin M Mazumder

US Patent:

7289945, Oct 30, 2007

Filed:

Oct 28, 2002

Appl. No.:

10/281857

Inventors:

Dan Jiao - Santa Clara CA, US
Mohiuddin Mazumder - San Jose CA, US
Changhong Dai - San Jose CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 17/50

US Classification:

703 14

Abstract:

In one embodiment, an interconnect structure may be analyzed to determine electromagnetic characteristics of the structure by identifying structure seeds corresponding to the structure; modeling the structure seeds to obtain field patterns; and processing the field patterns to obtain the electromagnetic characteristics.

US Patent:

7325208, Jan 29, 2008

Filed:

Sep 28, 2004

Appl. No.:

10/950676

Inventors:

Sourav Chakravarty - Hillsboro OR, US
Yaakov Ben-Noon - Herzlia, IL
Eli Chiprout - Tempe AZ, US
Mohiuddin Mazumder - San Jose CA, US
Dmitry Messerman - Haifa, IL

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 17/50

US Classification:

716 5, 716 4

Abstract:

Embodiments of the present invention provide a method, apparatus and system for inductance modeling. According to some exemplary embodiments, a method for inductance modeling may include determining a plurality of two-dimensional mutual inductance values corresponding to a designated victim within a geometrical event and a plurality of designated attackers, respectively. Other embodiments are described and claimed.

US Patent:

7402048, Jul 22, 2008

Filed:

Mar 30, 2006

Appl. No.:

11/393540

Inventors:

Pascal C. Meier - Sunnyvale CA, US
Michael W. Leddige - Beaverton OR, US
Mohiuddin Mazumder - San Jose CA, US
Mark Trobough - Olympia WA, US
Alok Tripathi - Beaverton OR, US
Ven R. Holalkere - Lakewood WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01R 12/00

US Classification:

439 65

Abstract:

An apparatus includes a printed circuit board (PCB) and a first flexible conductive cable (“flex cable”) secured to the PCB. The apparatus also includes a daughter card having an end adjacent to the PCB and a second flex cable secured to the daughter card. The apparatus further includes a connector which provides an electrically conductive connection between the first flex cable and the second flex cable. The connector is positioned to sandwich a portion of the first flex cable between the connector and the PCB.

US Patent:

7525723, Apr 28, 2009

Filed:

Jun 30, 2006

Appl. No.:

11/479889

Inventors:

Sanjay Dabral - Palo Alto CA, US
Mohiuddin Mazumder - San Jose CA, US
Hai-Feng Liu - Cupertino CA, US
Larry Tate - Hopkinton MA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G02F 1/29
G02B 6/26

US Classification:

359315, 385 40

Abstract:

An electrical connector to be electrically disposed between a first circuit board and a second circuit board to electrically couple the first circuit board with the second circuit board is disclosed. The electrical connector may have an electro-optic modulator to modulate optical signals based on electrical signals exchanged between the first and second circuit boards through the electrical connector. Systems incorporating such electrical connectors, and methods of using the electrical connectors and systems, such as for debug, are also disclosed.

US Patent:

8508947, Aug 13, 2013

Filed:

Oct 1, 2010

Appl. No.:

12/896579

Inventors:

Sanka Ganesan - Chandler AZ, US
Mohiuddin Mazumder - San Jose CA, US
Zhichao Zhang - Chandler AZ, US
Kemal Aygun - Chandler AZ, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 1/00
H05K 7/00

US Classification:

361749, 174117 FF

Abstract:

An assembly of substrate packages interconnected with flex cables. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing detachable inter-package flex cable connection. The flex cable comprises a transmission region that includes a plurality of signal traces and a ground plane. A plurality of solder mask strips are disposed on the plurality of signals traces to provide anchoring for the signal traces. The solder mask strips intersect the signals traces. The exposed signal traces and the ground plane are coated with organic solderability preservative material. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.

US Patent:

20070237527, Oct 11, 2007

Filed:

Mar 31, 2006

Appl. No.:

11/394697

Inventors:

Sanjay Dabral - Palo Alto CA, US
Mohiuddin Mazumder - San Jose CA, US
Ken Drottar - Portland OR, US
Hai-Feng Liu - Cupertino CA, US

International Classification:

H04B 10/04

US Classification:

398183000

Abstract:

A method for performing analysis of electrical signals in a system is disclosed. The system includes at least two circuit elements between which an electrical signal is transmitted. The method converts the electrical signal to dual optical signals, one of which is converted back to an electrical signal for receipt by the intended circuit element. The second optical signal may be transmitted a great distance, relative to electrical signals, allowing for remote analysis of the signal. The loss in converting the electrical signal to an optical signal, then back to an electrical signal is low compared to other debug methods. The method may be performed with high-speed signals.

US Patent:

20080122463, May 29, 2008

Filed:

Jun 30, 2006

Appl. No.:

11/479888

Inventors:

Sanjay Dabral - Palo Alto CA, US
Mohiuddin Mazumder - San Jose CA, US
Ken Drottar - Portland OR, US
Larry Tate - Hopkinton MA, US
John Critchlow - Northborough MA, US

International Classification:

G01R 31/308

US Classification:

324753, 356477

Abstract:

Testing microelectronic devices using electro-optic modulator probes is disclosed. In one aspect, a testing apparatus may include an electrical signaling medium to exchange electrical signals with a microelectronic device. The testing apparatus may include an electro-optic modulator probe to provide optical signals that are modulated by the electrical signals. An optoelectronic transducer may be included to convert the modulated optical signals to modulated electrical signals. The testing apparatus may further include a logic analyzer module to receive and analyze the modulated electrical signals. Other testing apparatus are disclosed, as well as systems incorporating such apparatus, and various methods of testing microelectronic devices.

US Patent:

6191472, Feb 20, 2001

Filed:

Jan 5, 1999

Appl. No.:

9/225926

Inventors:

Mohiuddin M. Mazumder - Santa Clara CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 2352

US Classification:

257691

Abstract:

A semiconductor package substrate includes at least one insulative layer, at least two metal lines next to one another on a first side of the insulative layer, and a first metal layer on a second side of the insulative layer opposing the first side. An opening is formed in the first metal layer in an area between the metal lines. Two lands remain part of the first metal layer. The lands are located adjacent the opening and each land opposes a respective one of the metal lines located next to one another.