Nathan T Egan

US Patent:

20180348806, Dec 6, 2018

Filed:

Aug 13, 2018

Appl. No.:

16/102637

Inventors:

- Norwood MA, US
Wenhua W. YANG - Lexington MA, US
Nathan T. EGAN - Burlington MA, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

G05F 3/02
H03M 1/10

Abstract:

In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.

US Patent:

20180006661, Jan 4, 2018

Filed:

Sep 13, 2017

Appl. No.:

15/703840

Inventors:

Nathan Egan - Burlington MA, US
Divya Kesharwani - Woburn MA, US
Frank Op 't Eynde - Wilsele, BE

International Classification:

H03M 3/00

Abstract:

According to at least one aspect, a delta sigma modulator circuit is provided. The delta sigma modulator circuit includes a first signal processor circuit configured to receive an input signal and a feedback signal and generate a processed signal using the input signal and the feedback signal, a quantizer configured to generate a digital code using the processed signal, a second signal processor circuit configured to receive the digital code, segment the digital code to form a segmented digital code that is smaller in size than the digital code, and generate a rotated digital code using the segmented digital code at least in part by rotating the segmented digital code to compensate for an excess loop delay in the circuit, and an digital-to-analog converter (DAC) configured to receive the rotated digital code and generate the feedback signal using the rotated digital code.

US Patent:

20170194984, Jul 6, 2017

Filed:

Mar 17, 2017

Appl. No.:

15/461502

Inventors:

- Hsin-Chu, TW
Divya Kesharwani - Woburn MA, US
Nathan Egan - Burlington MA, US

International Classification:

H03M 3/00

Abstract:

A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.

US Patent:

20160365870, Dec 15, 2016

Filed:

Mar 14, 2016

Appl. No.:

15/069951

Inventors:

- Hsin-Chu, TW
Divya Kesharwani - Woburn MA, US
Nathan Egan - Burlington MA, US

International Classification:

H03M 3/00

Abstract:

A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.

US Patent:

20160211861, Jul 21, 2016

Filed:

Oct 19, 2015

Appl. No.:

14/886545

Inventors:

- Hsin-Chu, TW
Nathan Egan - Burlington MA, US
Khurram Muhammad - Fort Worth TX, US
Tien-Yu Lo - Hsinchu City, TW
Chi-Lun Lo - Taoyuan County, TW
Michael A. Ashburn - Groton MA, US

Assignee:

MediaTek Inc. - Hsin-Chu

International Classification:

H03M 3/00

Abstract:

Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.

US Patent:

20150220100, Aug 6, 2015

Filed:

Jan 31, 2014

Appl. No.:

14/169986

Inventors:

- Norwood MA, US
Wenhua W. Yang - North Andover MA, US
Nathan T. Egan - Burlington MA, US

Assignee:

ANALOG DEVICES, INC. - Norwood MA

International Classification:

G05F 3/02
H03M 1/10

Abstract:

In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.