Nathan Reed Knight

US Patent:

7331022, Feb 12, 2008

Filed:

Apr 6, 2005

Appl. No.:

11/100686

Inventors:

Jeffrey Orion Pritchard - Santa Cruz CA, US
Joel Seely - Fremont CA, US
Nathan Knight - Santa Cruz CA, US
Eric Joseph Lechner - Santa Cruz CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

G06F 17/50

US Classification:

716 3, 716 5, 716 15

Abstract:

A method for automating pin assignments through an electronic design automation (EDA) development tool is provided. In the method, components for a chip design are selected and a board in which the chip design is to be implemented is identified. A port of one of the selected components is associated with a pin of the board through a component-based file. Thus, the component-based file maps the port to the pin. By utilizing a component based file, the mapping of the port to the pin is maintained during propagation of the chip design from a component level to a system level, even if the port name should change. A system for generating a chip design is also provided.

US Patent:

7685418, Mar 23, 2010

Filed:

Jan 19, 2005

Appl. No.:

11/038941

Inventors:

Nathan G. Knight - Santa Cruz CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

H04L 9/00

US Classification:

713165, 713164, 713150

Abstract:

Methods and apparatus for providing protection of pre-designed electronic components or modules (“intellectual property”) provided on target hardware devices are described herein. According to various embodiments, the component and the target hardware device include mechanisms for providing a first sequence and a second sequence respectively. While the component is running on the target hardware device, a comparator accesses and compares the first sequence with the second sequence. The comparator may either be included with the component or the target hardware device. If the first and second sequences match, a function of the component is allowed to operate with the target hardware device; otherwise, the function is prevented from operating with the target hardware device. As such, unauthorized use of intellectual property can be controlled.

US Patent:

8397067, Mar 12, 2013

Filed:

Jan 25, 2010

Appl. No.:

12/693223

Inventors:

Nathan G. Knight - Santa Cruz CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

H04L 29/06

US Classification:

713165, 713164, 713150

Abstract:

Methods and apparatus for providing protection of pre-designed electronic components or modules (“intellectual property”) provided on target hardware devices are described herein. According to various embodiments, the component and the target hardware device include mechanisms for providing a first sequence and a second sequence respectively. While the component is running on the target hardware device, a comparator accesses and compares the first sequence with the second sequence. The comparator may either be included with the component or the target hardware device. If the first and second sequences match, a function of the component is allowed to operate with the target hardware device; otherwise, the function is prevented from operating with the target hardware device. As such, unauthorized use of intellectual property can be controlled.

US Patent:

20200091734, Mar 19, 2020

Filed:

Sep 19, 2018

Appl. No.:

16/135937

Inventors:

- Scotts Valley CA, US
Bryan Scott Cady - Boulder Creek CA, US
Nathan Glenn Knight - Santa Cruz CA, US

International Classification:

H02J 7/00
H02J 7/02
G01R 31/36
H01M 10/44
H01M 10/48
H01M 10/42

Abstract:

When in long term storage, battery degradation is avoided by performing battery charge cycles at a voltage level where a change in the battery's voltage divided by a change in the battery's storage capacity is at a minimum, rather than discharging the battery to its minimum storage capacity and then charging to its maximum storage capacity. Further, based on physical and practical limitations, such battery charge cycles can instead be performed within a range or delta Depth of Discharge (“DOD”) and corresponding battery voltage levels rather than at a single voltage level, while still avoiding battery degradation.

US Patent:

20140125259, May 8, 2014

Filed:

Nov 7, 2012

Appl. No.:

13/671295

Inventors:

Zero Motorcycles, Inc. - , US
Nathan Glenn Knight - Santa Cruz CA, US

Assignee:

Zero Motorcycles, Inc. - Scotts Valley CA

International Classification:

G01R 31/36
H02P 31/00

US Classification:

318139, 324430

Abstract:

Improved protection for a rechargeable battery from damage by being discharged below a cut-off voltage is provided. The measured voltage of a battery under load is lower than the measured voltage of the battery under no load. As the cut-off voltage for the battery is specified as a no load voltage, comparing the measured voltage of the battery under load to the cut-off voltage would result in stopping use of the battery with useable charge remaining. Through testing, a set of relationships for estimating the no load voltage of a battery under load has been determined. Using this set of relationships with battery measurements, an estimated no load voltage for the battery is determined. This estimated no load voltage is compared to the cut-off voltage. This allows for full use of the battery while stopping use of the battery when its voltage reaches the cut-off, thereby preventing damage.

US Patent:

20140091751, Apr 3, 2014

Filed:

Oct 2, 2012

Appl. No.:

13/633419

Inventors:

Zero Motorcycles, Inc - , US
Nathan Glenn Knight - Santa Cruz CA, US
Andrew Martin Letton - Redwood Estates CA, US
Kenyon Michael Kluge - Santa Cruz CA, US
Abraham Askenazi - San Jose CA, US

Assignee:

Zero Motorcycles, Inc - Scotts Valley CA

International Classification:

H02J 7/00

US Classification:

320106, 320126

Abstract:

Energy storage system having one or more battery packs and a system controller for controlling the battery packs. Each battery pack has rechargeable storage cells and a battery pack controller in communication with the system controller. Through the operation of the system controller, battery packs with different initial charge states can be operated in parallel during the charge or discharge process. Discharging multiple battery packs in parallel offers not only higher capacity and longer run time than is available from a single battery pack, but also offers higher peak currents than available from a single battery pack, important in motor control applications. Battery pack design including a battery pack connector with both power and control contacts supporting user replacement of the battery packs.