Nathan J Schultz

US Patent:

6957352, Oct 18, 2005

Filed:

Mar 15, 2002

Appl. No.:

10/099648

Inventors:

Robert J. Greiner - Beaverton OR, US
Benson D. Inkley - North Plains OR, US
Nathan C. Schultz - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F001/26

US Classification:

713300

Abstract:

Techniques for a processor temperature control interface. In one embodiment, a processor includes a bidirectional interface and output logic to assert a first signal indicating an internal high temperature on the bidirectional interface. Throttling logic throttles operations of the processor if either the internal high temperature is indicated or if an external signal is received on the bidirectional interface.

US Patent:

7761723, Jul 20, 2010

Filed:

Aug 11, 2005

Appl. No.:

11/203004

Inventors:

Robert J. Greiner - Beaverton OR, US
Benson D. Inkley - North Plains OR, US
Nathan C. Schultz - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/00

US Classification:

713310, 713300, 713320, 713322

Abstract:

Techniques for a processor temperature control interface. In one embodiment, a processor includes a bidirectional interface and output logic to assert a first signal indicating an internal high temperature on the bidirectional interface. Throttling logic throttles operations of the processor if either the internal high temperature is indicated or if an external signal is received on the bidirectional interface.

US Patent:

58899774, Mar 30, 1999

Filed:

Dec 13, 1996

Appl. No.:

8/766728

Inventors:

Nathan Schultz - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1336

US Classification:

395500

Abstract:

A handshake mechanism is provided to allow feature compatible processor and motherboard combinations to operate, and incompatible combinations to fail safely. The handshake mechanism also facilitates communication of feature settings between a motherboard and an attached processor. For each feature, the handshake mechanism includes connection pins correspondingly disposed on complementary connectors of the processors and the motherboards for conveying a feature setting selection signal for the feature. The handshake mechanism further includes particular manners for connecting the processors' connection pins and the motherboards' connection pins to their respective internal circuitry, depending on the manners the feature is supported by the various processors and motherboards.