Nathaniel M Simmons

US Patent:

45244421, Jun 18, 1985

Filed:

Jun 22, 1983

Appl. No.:

6/506744

Inventors:

Nathaniel Simmons - Downers Grove IL
Sergio E. Puccini - Scottsdale AZ
Stig E. Magnusson - Phoenix AZ
Kanal I. Parikh - Phoenix AZ

Assignee:

GTE Automatic Electric Inc. - Northlake IL

International Classification:

H04Q 1104

US Classification:

370 63

Abstract:

A space stage for a T-S-T digital switching system is shown arranged into four identical space stage units (SSU). Each SSU is arranged into modular functional elements. The elements are combined in each SSU to allow the space stage to grow modularly, interconnecting from thirty-two to sixty-four originating time and terminating time stages.

US Patent:

45258317, Jun 25, 1985

Filed:

Jun 22, 1983

Appl. No.:

6/506564

Inventors:

Nathaniel Simmons - Downers Grove IL
Kamal I. Parikh - Phoenix AZ

Assignee:

GTE Automatic Electric Inc. - Northlake IL

International Classification:

H04Q 1104

US Classification:

370 63

Abstract:

An interface arrangement is shown compensating for timing delays during transmission of communication information between a transmitting and receiving stage of a T-S-T digital switching system. The arrangement includes a buffer at the receiving stage having first and second storage files. During a first time slot communication information is written in the first file using control signals transmitted along with the communication information while simultaneously the second file is read using a local control signal. In the subsequent time slot the second file is written to and the first file is read, providing a one time slot slip between the transmitting and receiving stages.

US Patent:

45204780, May 28, 1985

Filed:

Jun 22, 1983

Appl. No.:

6/506563

Inventors:

Nathaniel Simmons - Downers Grove IL
Sergio E. Puccini - Scottsdale AZ
Stig E. Magnusson - Phoenix AZ
Kamal I. Parikh - Phoenix AZ

Assignee:

GTE Automatic Electric Inc. - Northlake IL

International Classification:

H04J 1104

US Classification:

370 63

Abstract:

A space stage for a T-S-T digital switching system is shown arranged to interconnect the originating time stages (OTS) and terminating time stages (TTS) of a first time group and the OTS's and TTS's of a second time group. The space stage includes four identical space stage units (SSU). The first SSU interconnects the OTS's and TTS's of the first time group and the second SSU the OTS's and TTS's of the second time group. The third SSU interconnects the OTS's of the first time group to the TTS's of the second time group and the fourth SSU interconnects the OTS's of the second time group to the TTS's of the first time group.

US Patent:

45244413, Jun 18, 1985

Filed:

Jun 22, 1983

Appl. No.:

6/506746

Inventors:

Nathaniel Simmons - Downers Grove IL
Sergio E. Puccini - Scottsdale AZ
Stig E. Magnusson - Phoenix AZ
Kamal I. Parikh - Phoenix AZ

Assignee:

GTE Automatic Electric Inc. - Northlake IL

International Classification:

H04Q 1104

US Classification:

370 63

Abstract:

A space stage for a T-S-T digital switching system is shown arranged into modular functional elements. The elements are combined allowing the space stage to grow modularly to interconnect from one to thirty-two originating time stages and terminating time stages.

US Patent:

45690430, Feb 4, 1986

Filed:

Sep 3, 1985

Appl. No.:

6/773083

Inventors:

Nathaniel Simmons - Downers Grove IL
Sergio E. Puccini - Scottsdale AZ
Stig E. Magnusson - Phoenix AZ
Kamal I. Parikh - Phoenix AZ

Assignee:

GTE Automatic Electric Inc. - Northlake IL

International Classification:

H04Q 1104

US Classification:

370 63

Abstract:

An arrangement for interfacing the originating time stage (OTS) and terminating time stage (TTS) of a time and control unit (TCU) to the space stage of T-S-T digital switching system. The space stage includes an intra-path through the space stage as well as an interpath. The interface transmits PCM samples simultaneously from the OTS to both the intra and interpaths of the space stage. PCM samples from the space stage are received by an intra buffer and an inter buffer from the intra path and inter path respectively. A TCU control memory gates and connects either the intra buffer or inter buffer to the TTS.