Paul C. Wilson - Mendon MA, US Scott Romano - Newton MA, US Oren Mano - Framingham MA, US Robert DeCrescenzo - Franklin MA, US Steven Kosto - Marlboro MA, US Waiyaki O. Buliro - Randolph MA, US Matthew Britt Sullivan - Holden MA, US
A data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The interface includes: a global memory; a plurality of front-end directors coupled between the global memory and the host computer/server; and, a plurality of back-end directors coupled between the global memory and the bank of disk drives. Each one of the first directors and each one of the second directors has a data pipe. Each one of such front-end directors passes front-end data between the global memory and the host computer through the data pipe therein and each one of the second directors passing back-end data between the global memory and the bank of disk drives through the data pipe therein. Each one of the first and second directors includes a data pipe controller, responsive to data fed to the data pipe, for performing a selected one of a plurality of functions on the data passing through the data pipe to obtain data from the global memory or to read such data into the global memory. The function is determined by descriptors associated with the data fed to the data pipe therein.
Method And Apparatus Connecting Between A Fiber Channel And A Cache Memory
Oren Mano - Framingham MA Paul C. Wilson - Mendon MA
Assignee:
EMC Corporation - Hopkinton MA
International Classification:
G06F 1110
US Classification:
714763
Abstract:
A method and apparatus for connecting between a serial fibre channel link and a global memory provide a bidirectional high throughput path for enabling reliable communications and translation from the fibre channel format to the format required by the global memory. The apparatus includes, in series from the fibre channel link, a bidirectional physical interface, a bidirectional conversion circuitry for converting between an electrical protocol from the fibre channel and a high speed conventional protocol such as a PCI bus, a bidirectional lower machine controlled by a central processing unit and able to add block protection words to the passing data stream, and for separating the data stream into one of a plurality of pipes as directed by the CPU, an error detection and correction circuitry for adding yet additional error correcting data to the data stream as it written in the global memory and for detecting and correcting, if possible, any errors in data being retrieved from global memory. The apparatus further includes dual port random access memories for buffering between the error detection and correction circuitry and the global memory. A secondary port interface is provided, connected to the CPU bus, for providing information to configure at least conversion circuitry.
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