Patrick M Connor

US Patent:

20210209035, Jul 8, 2021

Filed:

Mar 25, 2021

Appl. No.:

17/212722

Inventors:

- Santa Clara CA, US
Matthew J. ADILETTA - Bolton MA, US
Hugh WILKINSON - Newton MA, US
Patrick CONNOR - Beaverton OR, US

International Classification:

G06F 13/16
G06F 13/40
G06F 13/42

Abstract:

Examples described herein relate to an apparatus that includes at least two processing units and a memory hub coupled to the at least two processing units. In some examples, the memory hub includes a home agent. In some examples, the memory hub is to perform a memory access request involving a memory device, a first processing unit among the at least two processing units is to send the memory access request to the memory hub. In some examples, the first processing unit is to offload at least some but not all home agent operations to the home agent of the memory hub. In some examples, the first processing unit comprises a second home agent and wherein the second home agent is to perform the at least some but not all home agent operations before the offload of at least some but not all home agent operations to the home agent of the memory hub. In some examples, based on provision of the at least some but not all home agent operations to be performed by the second home agent, the second home agent is to perform the at least some but not all home agent operations.