Patrick J Kawamura

US Patent:

60058226, Dec 21, 1999

Filed:

Dec 10, 1998

Appl. No.:

9/209375

Inventors:

Patrick J. Kawamura - Richardson TX
Jeffrey E. Koelling - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11C 800

US Classification:

36523006

Abstract:

Bank selectable Y-decoder circuit (24) generates a plurality of Y-select signals (60, 62, 64, 66) for addressing columns of a plurality of memory banks (12, 14) in a memory array (10) and includes a high-order column factors decode circuit (34) for receiving a plurality of column factor signals. A first low-order column factor circuit (30) generates a first set of Y-select signals (60, 62) for addressing at least one column of a first set of memory banks (12). A second low-order column factors circuit (32) generates a second set of Y-select signals (64, 66) for addressing at least one column of a second set of memory banks (14). The result is a Y-decoder circuit (24) that consumes less silicon die area, without a reduction in circuit performance.

US Patent:

20200322004, Oct 8, 2020

Filed:

Jun 22, 2020

Appl. No.:

16/907642

Inventors:

- Plano TX, US
Jonathan Knight - Yokohama, JP
Patrick Kawamura - Fairview TX, US
Wayne T. Chen - Plano TX, US

Assignee:

TRIUNE IP LLC - Plano TX

International Classification:

H04B 5/00
H01Q 1/50
H01Q 3/24
H01Q 3/02
H01Q 7/00
H01Q 21/28

Abstract:

A resonant circuit dynamic optimization system is described herein that can exhibit improved system charging functionality, can have multi-input charging functionality, and can improve the efficiency and speed of charging electronic devices. The resonant circuit dynamic optimization system can comprise at least one antenna configured to receive or transmit an electromagnetic signal, at least one variable component, and at least one dynamic adjustment circuit. The dynamic adjustment circuit can adjust the variable component to thereby modify the power transfer efficiency of the electromagnetic signal.