Patrick M Shepherd

US Patent:

8118618, Feb 21, 2012

Filed:

May 3, 2010

Appl. No.:

12/772932

Inventors:

Kenneth W. Deboe - Santa Clara CA, US
Frank O. Uher - Los Altos CA, US
Jovan Jovanovic - Santa Clara CA, US
Scott E. Lindsey - Brentwood CA, US
Thomas T. Maenner - San Ramon CA, US
Patrick M. Shepherd - San Jose CA, US
Jeffrey L. Tyson - Mountain View CA, US
Mark C. Carbone - Cupertino CA, US
Paul W. Burke - Hayward CA, US
Doan D. Cao - San Jose CA, US
James F. Tomic - Oakland CA, US
Long V. Vu - San Jose CA, US

Assignee:

Aehr Test Systems - Fremont CA

International Classification:

H01R 24/00

US Classification:

439676

Abstract:

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

US Patent:

8388357, Mar 5, 2013

Filed:

Jan 18, 2012

Appl. No.:

13/353269

Inventors:

Kenneth W. Deboe - Santa Clara CA, US
Frank O. Uher - Los Altos CA, US
Jovan Jovanovic - Santa Clara CA, US
Scott E. Lindsey - Brentwood CA, US
Thomas T. Maenner - San Ramon CA, US
Patrick M. Shepherd - San Jose CA, US
Jeffrey L. Tyson - Mountain View CA, US
Mark C. Carbone - Cupertino CA, US
Paul W. Burke - Hayward CA, US
Doan D. Cao - San Jose CA, US
James F. Tomic - Oakland CA, US
Long V. Vu - San Jose CA, US

Assignee:

Aehr Test Systems - Fremont CA

International Classification:

H01R 12/00

US Classification:

439 70

Abstract:

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

US Patent:

8506335, Aug 13, 2013

Filed:

Jan 30, 2013

Appl. No.:

13/754765

Inventors:

Kenneth W. Deboe - Santa Clara CA, US
Frank O. Uher - Los Altos CA, US
Jovan Jovanovic - Santa Clara CA, US
Scott E. Lindsey - Brentwood CA, US
Thomas T. Maenner - San Ramon CA, US
Patrick M. Shepherd - San Jose CA, US
Jeffrey L. Tyson - Mountain View CA, US
Mark C. Carbone - Cupertino CA, US
Paul W. Burke - Hayward CA, US
Doan D. Cao - San Jose CA, US
James F. Tomic - Oakland CA, US
Long V. Vu - San Jose CA, US

Assignee:

AEHA Test Systems - Fremont CA

International Classification:

H01R 4/50

US Classification:

439770

Abstract:

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

US Patent:

8628336, Jan 14, 2014

Filed:

Jul 11, 2013

Appl. No.:

13/939364

Inventors:

Kenneth W. Deboe - Santa Clara CA, US
Frank O. Uher - Los Altos CA, US
Jovan Jovanovic - Santa Clara CA, US
Scott E. Lindsey - Brentwood CA, US
Thomas T. Maenner - San Ramon CA, US
Patrick M. Shepherd - San Jose CA, US
Jeffrey L. Tyson - Mountain View CA, US
Mark C. Carbone - Cupertino CA, US
Paul W. Burke - Hayward CA, US
Doan D. Cao - San Jose CA, US
James F. Tomic - Oakland CA, US
Long V. Vu - San Jose CA, US

Assignee:

Aehr Test Systems - Fremont CA

International Classification:

H01R 12/00

US Classification:

439 70

Abstract:

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

US Patent:

54295106, Jul 4, 1995

Filed:

Dec 1, 1993

Appl. No.:

8/161282

Inventors:

William D. Barraclough - Danville CA
Mikhail A. Alperin - San Francisco CA
Jeffrey A. Brehm - So. San Francisco CA
John D. Hoang - Milpitas CA
Patrick M. Shepherd - San Jose CA
James F. Tomic - San Francisco CA

Assignee:

Aehr Test Systems, Inc. - Mountain View CA

International Classification:

H01R 909

US Classification:

439 59

Abstract:

A high density interconnect system (30) employs contact fingers (32) on both surfaces (34) and (36) of burn-in PCB (38), feed-through PCB (40) and driver PCB (42). Each of the PCBs (38), (40) and (42) has a card-edge connector (44), (46) and (48). The feed-through PCB (40) has a second card-edge connector (40) and a second set of contact fingers (32), since it mates with both the burn-in PCB (38) and the driver PCB (42). The contact fingers (32) and the card-edge connectors (44), (46), (48) and (50) of each PCB (38), (40) and (42) mate inversely with each other on adjacent PCBs, i. e. , the card-edge connector (44) of the burn-in PCB (38) mates with the contact fingers (32) of the feed-through PCB (40), and the card-edge connector (46) of the feed-through PCB (40) mates with the contact fingers (32) of the burn-in PCB (38), for example. The same relationship exists between the card-edge connector (50) of the feed-through PCB (40), the card-edge connector (48) of the driver PCB (42) and the contact fingers (32) of the feed-through PCB(40) and the driver PCB (42).

US Patent:

56824726, Oct 28, 1997

Filed:

Mar 17, 1995

Appl. No.:

8/407103

Inventors:

Jeffrey A. Brehm - So. San Francisco CA
Patrick M. Shepherd - San Jose CA

Assignee:

Aehr Test Systems - Mountain View CA

International Classification:

G06F 1100

US Classification:

39518301

Abstract:

A novel system and method for testing semiconductor devices has a pattern generator implementing a test signal algorithm uniquely coupled with a recording system which is an individual hardware system for each device under test. The improved pattern generator and recording system functions in conjunction with a system designed to perform parallel test and burn-in of semiconductor devices, such as the Aehr Test MTX System. The MTX can functionally test large quantities of semiconductor devices in parallel. It can also compensate for the appropriate round trip delay value for each chip select state for each device under test. This system of testing provides an effective and practical method for reducing overall test cost without sacrificing quality.

US Patent:

20210025935, Jan 28, 2021

Filed:

Sep 29, 2020

Appl. No.:

17/036839

Inventors:

- Fremont CA, US
Kenneth W. Deboe - Santa Clara CA, US
Frank O. Uher - Los Altos CA, US
Jovan Jovanovic - Santa Clara CA, US
Scott E. Lindsey - Brentwood CA, US
Thomas T. Maenner - San Ramon CA, US
Patrick M. Shepherd - San Jose CA, US
Jeffrey L. Tyson - Mountain View CA, US
Mark C. Carbone - Cupertino CA, US
Paul W. Burke - Hayward CA, US
Doan D. Cao - San Jose CA, US
James F. Tomic - Oakland CA, US
Long V. Vu - San Jose CA, US

Assignee:

Aehr Test Systems - Fremont CA

International Classification:

G01R 31/28
G01R 31/26
G01R 31/00
G06F 8/30

Abstract:

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

US Patent:

20180372792, Dec 27, 2018

Filed:

Sep 4, 2018

Appl. No.:

16/121192

Inventors:

- Fremon CA, US
Kenneth W. Deboe - Santa Clara CA, US
Frank O. Uher - Los Altos CA, US
Jovan Jovanovic - Santa Clara CA, US
Scott E. Lindsey - Brentwood CA, US
Thomas T. Maenner - San Ramon CA, US
Patrick M. Shepherd - San Jose CA, US
Jeffrey L. Tyson - Mountain View CA, US
Mark C. Carbone - Cupertino CA, US
Paul W. Burke - Hayward CA, US
Doan D. Cao - San Jose CA, US
James F. Tomic - Oakland CA, US
Long V. Vu - San Jose CA, US

Assignee:

Aehr Test Systems - Fremont CA

International Classification:

G01R 31/28
G06F 8/30
G01R 31/26
G01R 31/00
G01R 31/319

Abstract:

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.