Paul T Sprague

US Patent:

8520520, Aug 27, 2013

Filed:

Nov 6, 2003

Appl. No.:

10/703186

Inventors:

Sean S. B. Moore - Hollis NH, US
Howard C. Reith - Lee NH, US
Paul Sprague - North Berwick ME, US

Assignee:

Avaya, Inc. - Basking Ridge NJ

International Classification:

H04L 12/28

US Classification:

370235, 370389

Abstract:

A software and hardware system that provides for per flow guaranteed throughput and goodput for packet data flows using network transport protocols that have window-based flow control mechanisms or TCP-friendly flow control mechanisms. The system and method for guaranteed throughput of individual flows in turn enables a method for provisioning link bandwidth among multiple flows and provisioning network throughput and goodput at the granularity of individual flows. The invention also eliminates Layer 3 packet drops for a data flow using window-based flow control or TCP-friendly flow control, which in turn obviates congestion collapse and quality collapse scenarios.

US Patent:

20050111362, May 26, 2005

Filed:

Sep 9, 2004

Appl. No.:

10/936881

Inventors:

Ilya Freytsis - Swampscott MA, US
Paul Sprague - North Berwick ME, US
James Towey - Sandwich MA, US

International Classification:

H04L012/56

US Classification:

370230000, 370235000, 370412000

Abstract:

A classification mechanism automatically aligns time-sensitive data streams to sequences (schedules), according to information in the packets or other information and classification criteria specified by a human network administrator, a sequence agent, an application program or otherwise. When a packet arrives at a first sequence-aware switch along a path, the packet is aligned to a new or existing sequence. When a new sequence is established, appointments are reserved at sequence-aware switches along the path. The packet is placed in a queue, based on its classification. When the packet reaches the head of the queue, at that queue's appointment time, the switch forwards the packet along the path. If possible, appointments have been reserved at subsequent switches along the packet's path, so the packet can be forwarded through the subsequent switches without delay. Packets that do not match any classification criteria are handled on a best-effort basis.

US Patent:

20220210119, Jun 30, 2022

Filed:

Mar 18, 2022

Appl. No.:

17/698164

Inventors:

- Portsmouth NH, US
Paul Sprague - North Berwick ME, US
Peter Geremia - Portsmouth NH, US
Sean Moore - Hollis NH, US

International Classification:

H04L 61/2521
H04L 61/2514
H04L 45/00

Abstract:

Network devices that are inserted inline into network links and process in-transit packets may significantly improve their packet-throughput performance by not assigning L3 IP addresses and L2 MAC addresses to their network interfaces and thereby process packets through a logical fast path that bypasses the slow path through the operating system kernel. When virtualizing such Bump-In-The-Wire (BITW) devices for deployment into clouds, the network interfaces must have L3 IP and L2 MAC addresses assigned to them. Thus, packets are processed through the slow path of a virtual BITW device, significantly reducing the performance. By adding new logic to the virtual BITW device and/or configuring proxies, addresses, subnets, and/or routing tables, a virtual BITW device can process packets through the fast path and potentially improve performance accordingly. For example, the virtual BITW device may be configured to enforce a virtual path (comprising the fast path) through the virtual BITW device.